# OPA4130UA

**Texas Instruments** · FET Input Amplifiers · SOIC-14

OPA4130UA from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT A | output | Output of channel A; short-circuit current is continuous-rated to ground for one amplifier per package. |
| 2 | -IN A | input | Inverting input of channel A; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 3 | +IN A | input | Noninverting input of channel A; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 4 | V+ | power_in | Positive (highest) power supply; supply is ±2.25 V to ±18 V dual or 4.5 V to 36 V single. |
| 5 | +IN B | input | Noninverting input of channel B; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 6 | -IN B | input | Inverting input of channel B; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 7 | OUT B | output | Output of channel B; short-circuit current is continuous-rated to ground for one amplifier per package. |
| 8 | OUT C | output | Output of channel C; short-circuit current is continuous-rated to ground for one amplifier per package. |
| 9 | -IN C | input | Inverting input of channel C; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 10 | +IN C | input | Noninverting input of channel C; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 11 | V- | power_in | Negative (lowest) power supply; (V+) - (V-) must be ±2.25 V to ±18 V dual or 4.5 V to 36 V single. |
| 12 | +IN D | input | Noninverting input of channel D; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 13 | -IN D | input | Inverting input of channel D; input voltage must stay within (V-) - 0.5 V to (V+) + 0.5 V and input current within ±10 mA. |
| 14 | OUT D | output | Output of channel D; short-circuit current is continuous-rated to ground for one amplifier per package. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Amplifiers/Comparators |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage, (V+) – (V–), dual supply | VS |  |  | 18 | V | Dual supply | 5 |
| Supply voltage, (V+) – (V–), single supply | VS |  |  | 36 | V | Single supply | 5 |
| Input current | II | -10 |  | 10 | mA |  | 5 |
| Operating temperature | TA | -40 |  | 125 | °C |  | 5 |
| Junction temperature | TJ |  |  | 150 | °C |  | 5 |
| Storage temperature | Tstg | -40 |  | 125 | °C |  | 5 |
| Supply voltage, (V+) – (V–), dual supply | VS | 2.25 | 15 | 18 | V | Dual supply | 5 |
| Supply voltage, (V+) – (V–), single supply | VS | 4.5 | 30 | 36 | V | Single supply | 5 |
| Ambient temperature | TA | -40 | 25 | 85 | °C |  | 5 |
| Input offset voltage | VOS | -1 | 0.2 | 1 | mV |  | 7 |
| Input offset voltage drift | dVOS/dT | -10 | 2 | 10 | μV/°C | TA = –40°C to +85°C | 7 |
| Power-supply rejection ratio | PSRR | -20 | 2 | 20 | μV/V | VS = ±2.25V to ±18V | 7 |
| Input bias current | IB | -20 | 5 | 20 | pA | High-speed test at TJ = 25°C | 7 |
| Input offset current | IOS | -20 | 2 | 20 | pA | High-speed test at TJ = 25°C | 7 |
| Common-mode rejection ratio | CMRR | 90 | 105 |  | dB | –13V ≤ VCM ≤ 11.5V | 7 |
| Open-loop voltage gain | AOL | 114 | 123 |  | dB | –13.8V ≤ VO ≤ 13V, RL = 10kΩ | 7 |
| Open-loop voltage gain | AOL | 104 | 110 |  | dB | –13V ≤ VO ≤ 12V, RL = 2kΩ | 7 |
| Quiescent current (per amplifier) | IQ | -650 | 530 | 650 | µA | IO = 0mA | 7 |
| Junction-to-ambient thermal resistance | RθJA |  | 110 |  | °C/W |  | 6 |
| Junction-to-case (top) thermal resistance | RθJC(top) |  | 56 |  | °C/W |  | 6 |
| Junction-to-board thermal resistance | RθJB |  | 53 |  | °C/W |  | 6 |
| Junction-to-top characterization parameter | ΨJT |  | 19 |  | °C/W |  | 6 |
| Junction-to-board characterization parameter | ΨJB |  | 46 |  | °C/W |  | 6 |

## CAD (KiCad official)

- Symbol: `OPA4130UA`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files: `opa4130ua-etched.step` / `opa4130ua-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `opa4130ua.step` / `opa4130ua.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/opa4130) (25 pp, sha256 `591e415d3f5247ba`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/opa4130ua-datasheet.pdf)