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OPA2846IDR

Public Made by Adom

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Texas Instruments Operational Amplifier, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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page.json opa2846idr: specified limits as data (metadata.characteristics, 43 rows from the datasheet) · Ray 14d ago
README.md opa2846idr: specified limits as data (metadata.characteristics, 43 rows from the datasheet) · Ray 14d ago

OPA2846IDR

Texas Instruments · Operational Amplifier · SOIC-8

OPA2846IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Channel A output; the datasheet specifies output swing of ±3.4V min into a ≥400Ω load and ±3.3V min into a 100Ω load at VS = ±5V.
2 -IN A input Channel A inverting input; the datasheet specifies a common-mode input range of ±3.2V min at +25°C for VS = ±5V.
3 +IN A input Channel A non-inverting input; the datasheet specifies a common-mode input range of ±3.2V min at +25°C for VS = ±5V.
4 V- power_in Negative power supply rail; the datasheet gives an absolute maximum total supply of ±6.5VDC and characterizes the device at VS = ±5V.
5 +IN B input Channel B non-inverting input; the datasheet specifies a common-mode input range of ±3.2V min at +25°C for VS = ±5V.
6 -IN B input Channel B inverting input; the datasheet specifies a common-mode input range of ±3.2V min at +25°C for VS = ±5V.
7 OUT B output Channel B output; the datasheet specifies output swing of ±3.4V min into a ≥400Ω load and ±3.3V min into a 100Ω load at VS = ±5V.
8 V+ power_in Positive power supply rail; the datasheet gives an absolute maximum total supply of ±6.5VDC and characterizes the device at VS = ±5V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Closed-Loop Bandwidth 250 300 MHz G = +10, RG = 50Ω, VO = 200mVPP; +25°C column 3
Closed-Loop Bandwidth 80 100 MHz G = +20, RG = 50Ω, VO = 200mVPP; +25°C column 3
Gain Bandwidth Product 1250 1650 MHz G ≥ +40; +25°C column 3
Bandwidth for 0.1dB Gain Flatness 40 100 MHz G = +10, RL = 100Ω, VO = 200mVPP; +25°C column 3
Harmonic Distortion 2nd-Harmonic -76 -70 dBc G = +10, f = 5MHz, VO = 2VPP, RL = 100Ω; +25°C column 3
Harmonic Distortion 2nd-Harmonic -100 -89 dBc G = +10, f = 5MHz, VO = 2VPP, RL = 500Ω; +25°C column 3
Harmonic Distortion 3rd-Harmonic -109 -95 dBc G = +10, f = 5MHz, VO = 2VPP, RL = 100Ω; +25°C column 3
Harmonic Distortion 3rd-Harmonic -112 -105 dBc G = +10, f = 5MHz, VO = 2VPP, RL = 500Ω; +25°C column 3
2-Tone, 3rd-Order Intercept 41 44 dBm G = +10, f = 10MHz; +25°C column 3
Input Voltage Noise 1.2 1.3 nV/√Hz f > 1MHz; +25°C column 3
Input Current Noise 2.8 3.5 pA/√Hz f > 1MHz; +25°C column 3
Rise-and-Fall Time 1.3 1.6 ns 0.2V Step; +25°C column 3
Slew Rate 500 600 V/µs 2V Step; +25°C column 3
Settling Time to 0.1% 12 14 ns 2V Step; +25°C column 3
Settling Time to 1% 8 10 ns 2V Step; +25°C column 3
Open-Loop Voltage Gain AOL 82 90 dB VO = 0V; +25°C column 3
Input Offset Voltage -0.65 0.15 0.65 mV VCM = 0V; +25°C column; printed ± 3
Average Offset Voltage Drift -1.6 0.5 1.6 µV/°C VCM = 0V; printed ± 3
Input Bias Current -10 -20 µA VCM = 0V; +25°C column; max printed as negative 3
Input Bias Current Drift -20 1 20 nA/°C VCM = 0V; printed ± 3
Input Offset Current -0.4 0.1 0.4 µA VCM = 0V; +25°C column; printed ± 3
Input Offset Current Drift -3 0.7 3 nA/°C VCM = 0V; printed ± 3
Common-Mode Input Range (CMIR) -3 3.2 3 V +25°C column; printed ± 3
Common-Mode Rejection Ratio (CMRR) 95 110 dB VCM = ±1V, Input Referred; +25°C column 3
Output Voltage Swing -3.3 3.4 3.3 V ≥ 400Ω Load; +25°C column; printed ± 3
Output Voltage Swing -3.2 3.3 3.2 V 100Ω Load; +25°C column; printed ± 3
Output Current, Sourcing 65 80 mA VO = 0V; +25°C column 3
Output Current, Sinking -65 -80 mA VO = 0V; +25°C column 3
Maximum Operating Voltage -6 6 V +25°C column; printed ± 4
Maximum Quiescent Current 25.2 25.9 mA VS = ±5V, Both Channels; +25°C column 4
Minimum Quiescent Current 24.5 25.2 mA VS = ±5V, Both Channels; +25°C column 4
Power-Supply Rejection Ratio (−PSRR) −PSRR 90 95 dB −VS = −4.5 to 5.5 (Input Referred); +25°C column 4
Power Supply Voltage (absolute maximum) -6.5 6.5 VDC Power Supply; printed ± 2
Differential Input Voltage -1.2 1.2 V printed ± 2
Storage Temperature Range (D) -65 125 °C Package D 2
Lead Temperature (soldering) 300 °C soldering, 10s 2
Junction Temperature (TJ) TJ 150 °C 2
ESD Rating (Human Body Model) 2000 V Human Body Model 2
ESD Rating (Charge Device Model) 1500 V Charge Device Model 2
ESD Rating (Machine Model) 200 V Machine Model 2
Specified Operating Voltage 5 V VS = ±5V (printed ±5 V) 4
Specified Operating Range (D Package) -40 85 °C D Package 4
Thermal Resistance, Junction-to-Ambient (D SO-8) JA 125 °C/W Junction-to-Ambient, D SO-8 4

CAD (KiCad official)

  • Symbol: OPA2846IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa2846idr-etched.step / opa2846idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa2846idr.step / opa2846idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (32 pp, sha256 978805e3faa4e9d8, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF