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docs opa2810idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers opa2810idr: viewers · Ray 1mo ago
opa2810idr-etched.fit.json opa2810idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2810idr-etched.glb opa2810idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2810idr-etched.step opa2810idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2810idr.glb Publish 0.1.0 · Ray 1mo ago
opa2810idr.kicad_mod Publish 0.1.0 · Ray 1mo ago
opa2810idr.kicad_sym Publish 0.1.0 · Ray 1mo ago
opa2810idr.lbr Publish 0.1.0 · Ray 1mo ago
opa2810idr.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.1.0 · Ray 1mo ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 13d ago
README.md opa2810idr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 19d ago

OPA2810IDR

Texas Instruments · FET InputAmplifiers · SOIC-8

OPA2810IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VO1 output Amplifier 1 output pin. Rail-to-rail output stage capable of sourcing/sinking up to 75 mA (typical) linear output current.
2 VIN1- input Amplifier 1 inverting input pin. FET input stage with 2 pA typical input bias current; rail-to-rail input range.
3 VIN1+ input Amplifier 1 noninverting input pin. FET input stage with 2 pA typical input bias current; rail-to-rail input range.
4 VS- power_in Negative power supply pin. Total supply voltage (VS+ − VS−) from 4.75 V to 27 V; typically −5 V for ±5 V split-supply operation.
5 VIN2+ input Amplifier 2 noninverting input pin. FET input stage with 2 pA typical input bias current; rail-to-rail input range.
6 VIN2- input Amplifier 2 inverting input pin. FET input stage with 2 pA typical input bias current; rail-to-rail input range.
7 VO2 output Amplifier 2 output pin. Rail-to-rail output stage capable of sourcing/sinking up to 75 mA (typical) linear output current.
8 VS+ power_in Positive power supply pin. Total supply voltage (VS+ − VS−) from 4.75 V to 27 V; typically +5 V for ±5 V split-supply operation. Quiescent current 3.6 mA per channel (typical).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • OPA2810IDR
  • OPA2810IDRIDCNR
  • OPA2810IDRIDCNT
  • OPA2810IDRIDGKR
  • OPA2810IDRIDGKT

CAD (KiCad official)

  • Symbol: OPA2810IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa2810idr-etched.step / opa2810idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa2810idr.step / opa2810idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (52 pp, sha256 6ee8a464a8f0bd03, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF