component

OPA251UA

Public Made by Adom

by adom

Texas Instruments Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentinterface icsopa251uafactory-2.0.0extractor-text

Verified OPA251UA

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: OPA251UA · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 35-page datasheet
  • ✓distributor: lcsc C2058580, digikey OPA251UA-ND, mouser 595-OPA251UA
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-rogbdddk/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.30)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ opa251ua.kicad_sym✓ opa251ua.kicad_mod✓ opa251ua.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 9d ago
viewers opa251ua: viewers · Ray 9d ago
opa251ua-etched.glb Publish 0.1.0 · Ray 9d ago
opa251ua-etched.step opa251ua: factory component page (tier=mfr) · Ray 9d ago
opa251ua-hero.glb opa251ua: hero GLB from the etched model (keeps the MPN mark) · Ray 9d ago
opa251ua-hero.overlay.json Publish 0.1.0 · Ray 9d ago
opa251ua.glb Publish 0.1.0 · Ray 9d ago
opa251ua.kicad_mod Publish 0.1.0 · Ray 9d ago
opa251ua.kicad_sym Publish 0.1.0 · Ray 9d ago
opa251ua.lbr Publish 0.1.0 · Ray 9d ago
opa251ua.step Publish 0.1.0 · Ray 9d ago
package.json Publish 0.1.0 · Ray 9d ago
page.json Set visibility: public · Ray 9d ago
README.md Publish 0.1.0 · Ray 9d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 9d ago

OPA251UA

Texas Instruments · Pre-ordered Chips · SOIC-8

OPA251UA from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TRIM passive External offset voltage adjustment pin, used together with pin 5 (see Section 6.1.2 of the datasheet).
2 -IN input Inverting input of the amplifier.
3 +IN input Noninverting input of the amplifier.
4 V- power_in Negative (lowest) power supply; the supply range is 2.7V to 36V single supply or ±1.35V to ±18V dual supply.
5 TRIM passive External offset voltage adjustment pin, used together with pin 1 (see Section 6.1.2 of the datasheet).
6 OUT output Amplifier output, with rail-to-rail swing to within 50mV of the supply rails.
7 V+ power_in Positive (highest) power supply; the supply range is 2.7V to 36V single supply or ±1.35V to ±18V dual supply.
8 NC unconnected No internal connection; can be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage OPAx251 VOS -250 50 250 µV VS = ±15V, TA = 25°C 9
Input offset voltage OPAx251 over temperature VOS -300 100 300 µV VS = ±15V, TA = -40°C to +85°C 9
Input offset voltage drift OPAx251 dVOS/dT 0.5 µV/°C TA = -40°C to +85°C 9
Power supply rejection ratio PSRR 3 30 µV/V VS = 2.7V to 36V 9
Power supply rejection ratio over temperature PSRR 30 µV/V VS = 2.7V to 36V, TA = -40°C to +85°C 9
Input bias current IB -4 -20 nA 9
Input bias current over temperature IB -25 nA TA = -40°C to +85°C 9
Input offset current IOS -2 0.1 2 nA 9
Input offset current over temperature IOS -2 2 nA TA = -40°C to +85°C 9
Input voltage noise 1.7 µVPP f = 0.1Hz to 10Hz 9
Input voltage noise density en 65 nV/√Hz f = 1kHz 9
Input current noise density in 40 fA/√Hz f = 1kHz 9
Common-mode rejection ratio CMRR 100 124 dB -15.2V < VCM < (V+), 14.2V 9
Common-mode rejection ratio over temperature CMRR 100 dB -15V < VCM < (V+), 14.2V, TA = -40°C to +85°C 9
Open-loop voltage gain AOL 100 128 dB (V-) + 250mV < VO < (V+), 250mV 9
Open-loop voltage gain over temperature AOL 100 dB (V-) + 250mV < VO < (V+), 250mV, TA = -40°C to +85°C 9
Open-loop voltage gain, RL = 20kΩ AOL 100 128 dB (V-) + 300mV < VO < (V+), 300mV, RL = 20kΩ 9
Open-loop voltage gain, RL = 20kΩ over temperature AOL 100 dB (V-) + 300mV < VO < (V+), 300mV, RL = 20kΩ, TA = -40°C to +85°C 9
Gain-bandwidth product GBW 30 kHz 9
Slew rate SR 0.01 V/µs VS = 5V, G = 1V/V 9
Overload recovery time 75 µs VS = VIN × G 9
Voltage output swing from rail 50 mV AOL > 100dB 10
Voltage output swing from rail 75 250 mV AOL > 100dB 10
Voltage output swing from rail over temperature 250 mV AOL > 100dB, TA = -40°C to +85°C 10
Voltage output swing from rail, RL = 20kΩ 100 300 mV AOL > 100dB, RL = 20kΩ 10
Voltage output swing from rail, RL = 20kΩ over temperature 300 mV AOL > 100dB, RL = 20kΩ, TA = -40°C to +85°C 10
Short-circuit current, source (single) ISC 4 mA Source, Single 10
Short-circuit current, sink (single) ISC -21 mA Sink, Single 10
Quiescent current per amplifier IQ 27 38 µA IO = 0mA 10
Quiescent current per amplifier over temperature IQ 45 µA IO = 0mA, TA = -40°C to +85°C 10
Supply voltage, single supply VS 36 V Single supply 5
Supply voltage, dual supply VS 18 V Dual supply, ± 5
Differential input voltage -0.5 0.5 V Differential 5
Operating temperature (absolute max) TA -55 125 °C 5
Junction temperature TJ 150 °C 5
Storage temperature Tstg -55 125 °C 5
Lead temperature 300 °C Soldering, 10s 5
Supply voltage, single supply (recommended) VS 2.7 30 36 V Single supply 5
Supply voltage, dual supply (recommended) VS 1.35 15 18 V Dual supply, ± 5
Operating temperature (recommended) TA -40 85 °C 5
Junction-to-ambient thermal resistance RθJA 150 ℃/W D (SOIC) 8 pins 6
Junction-to-case (top) thermal resistance RθJC(top) 67.6 ℃/W D (SOIC) 8 pins 6
Junction-to-board thermal resistance RθJB 75.4 ℃/W D (SOIC) 8 pins 6
Junction-to-top characterization parameter ψJT 15.1 ℃/W D (SOIC) 8 pins 6
Junction-to-board characterization parameter ψJB 74.2 ℃/W D (SOIC) 8 pins 6

CAD (KiCad official)

  • Symbol: OPA251UA
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa251ua-etched.step / opa251ua-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa251ua.step / opa251ua.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (35 pp, sha256 bcb0c538016c6445, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF