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OPA2375IPWR

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Texas Instruments Operational Amplifier, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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OPA2375IPWR

Texas Instruments · Operational Amplifier · TSSOP-8

OPA2375IPWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT1 output Channel 1 output of the dual op amp in the 8-pin TSSOP (PW) package.
2 IN1- input Inverting input for channel 1.
3 IN1+ input Noninverting input for channel 1.
4 V- power_in Negative (lowest) supply, or ground for single-supply operation; the datasheet gives 1.7 V to 5.5 V total supply for OPA2375.
5 IN2+ input Noninverting input for channel 2.
6 IN2- input Inverting input for channel 2.
7 OUT2 output Channel 2 output of the dual op amp in the 8-pin TSSOP (PW) package.
8 V+ power_in Positive (highest) supply; the datasheet gives 1.7 V to 5.5 V total supply for OPA2375 (V+ minus V-).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage, VS = (V+) – (V–) VS 0 6 V 7
Signal input pins current -10 10 mA 7
Operating ambient temperature TA -55 150 °C 7
Junction temperature TJ 150 °C 7
Storage temperature Tstg -65 150 °C 7
Supply voltage, (V+) – (V–), for OPA2375 and OPA4375 VS 1.7 5.5 V Operation between 1.7 V and 1.8 V only recommended for TA = 0 - 85 °C (footnote 1) 7
Specified temperature TA -40 125 °C 7
Input offset voltage VOS -0.5 0.15 0.5 mV VS = 5.0 V 9
Input offset voltage VOS -0.7 0.7 mV TA = –40°C to 125°C 9
Input offset voltage versus power supply (PSRR) PSRR -5.8 0.7 5.8 μV/V VS = 2.25 V to 5.5 V, VCM = V– 9
Common-mode rejection ratio CMRR 87 100 dB VS = 1.8 V, (V–) < VCM < (V+) – 1.2 V 9
Common-mode rejection ratio CMRR 94 110 dB VS = 5.5, (V–) < VCM < (V+) – 1.2 V 9
Open-loop voltage gain AOL 107 130 dB VS= 1.8 V, (V–) + 150 mV < VO < (V+) – 150 mV, RL = 2 kΩ to VS/2 9
Open-loop voltage gain AOL 110 132 dB VS = 1.8 V, (V–) + 40m V < VO < (V+) – 40 mV, RL = 10 kΩ to VS/2 9
Open-loop voltage gain AOL 140 dB VS= 5.5 V, (V–) + 150 mV < VO < (V+) – 150 mV, RL = 2 kΩ to VS/2 9
Open-loop voltage gain AOL 142 dB VS = 5.5 V, (V–) + 40m V < VO < (V+) – 40 mV, RL = 10 kΩ to VS/2 9
Positive rail headroom 5 14 mV VS = 5.5 V, RL = 10 kΩ 10
Negative rail headroom 5 14 mV VS = 5.5 V, RL = 10 kΩ 10
Positive rail headroom 7 mV VS = 5.5 V, RL = no load 10
Negative rail headroom 7 mV VS = 5.5 V, RL = no load 10
Positive rail headroom 35 mV VS = 5.5 V, RL = 2 kΩ 10
Negative rail headroom 35 mV VS = 5.5 V, RL = 2 kΩ 10
Short-circuit current ISC 68 mA 10
Quiescent current per amplifier IQ 990 1200 µA VS = 5.5 V, IO = 0 A 10
Quiescent current per amplifier IQ 1250 µA TA = –40°C to 125°C 10
Input offset voltage drift dVOS/dT 0.16 µV/℃ TA = –40°C to 125°C 9
Input bias current IB 3 pA 9
Input offset current IOS 0.5 pA 9
Channel separation 130 dB f = 20 kHz 9
Input voltage noise EN 1.2 µVPP f = 0.1 to 10 Hz 9
Input voltage noise EN 0.227 µVRMS f = 0.1 to 10 Hz 9
Input voltage noise density eN 30 nV/√Hz f = 10 Hz 9
Input voltage noise density eN 4.6 nV/√Hz f = 1 kHz 9
Input voltage noise density eN 3.5 nV/√Hz f = 10 kHz 9
Input current noise iN 23 fA/√Hz f = 1 kHz 9
Gain-bandwidth product GBW 10 MHz 10
Slew rate SR 4.6 V/μs VS = 5.5 V, G = +1, CL = 20 pF 10
Settling time tS 0.65 μs To 0.1%, VS = 5.5 V, VSTEP = 2 V, G = +1, CL = 20pF 10
Settling time tS 1.2 μs To 0.01%, VS = 5.5 V, VSTEP = 2 V, G = +1, CL = 20pF 10
Phase margin 55 ° G = +1, RL = 10kΩ, CL = 20 pF 10
Overload recovery time 0.2 μs VIN × gain > VS 10
Total harmonic distortion + noise THD+N 0.00015 % VS = 5.5 V, VCM = 2.5 V, VO = 1 VRMS, G = +1, f = 1 kHz, RL = 10 kΩ 10
Electro-magnetic interference rejection ratio EMIRR 51 dB f = 1 GHz 10
Open-loop output impedance ZO 165 Ω f = 2 MHz, IO = 0 A 10
Turn-on time 10 μs At TA = 25°C, VS = 5.5 V, VS ramp rate > 0.3 V/µs 10
Junction-to-ambient thermal resistance (TSSOP, PW) RθJA 185.6 °C/W 8
Junction-to-case (top) thermal resistance (TSSOP, PW) RθJC(top) 74.5 °C/W 8
Junction-to-board thermal resistance (TSSOP, PW) RθJB 116.3 °C/W 8
Junction-to-top characterization parameter (TSSOP, PW) ψJT 12.6 °C/W 8
Junction-to-board characterization parameter (TSSOP, PW) ψJB 114.6 °C/W 8

CAD (KiCad official)

  • Symbol: OPA2375IPWR
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: opa2375ipwr-etched.step / opa2375ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa2375ipwr.step / opa2375ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (69 pp, sha256 f585363797ad6663, retrieved 2026-10-10, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF