# OPA2335AIDR

**Texas Instruments** · Precision OpAmps · SOIC-8

OPA2335AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUTA | output | Channel A op-amp output. Rail-to-rail CMOS output stage capable of driving to within millivolts of V+ and V−. |
| 2 | -INA | input | Channel A inverting input. High-impedance CMOS input, diode-clamped to the supply rails; input signals beyond V±0.5 V should be current-limited to ≤10 mA. |
| 3 | +INA | input | Channel A non-inverting input. High-impedance CMOS input, common-mode range extends to V− (rail-to-rail input on the negative rail); diode-clamped to the supply rails. |
| 4 | V- | power_in | Negative supply / ground pin. Connect to 0 V for single-supply operation, or to −1.35 V to −2.75 V for split-supply operation. Total supply (V+ − V−) must not exceed 7 V absolute max. |
| 5 | +INB | input | Channel B non-inverting input. High-impedance CMOS input, common-mode range extends to V−; diode-clamped to the supply rails. |
| 6 | -INB | input | Channel B inverting input. High-impedance CMOS input, diode-clamped to the supply rails; input signals beyond V±0.5 V should be current-limited to ≤10 mA. |
| 7 | OUTB | output | Channel B op-amp output. Rail-to-rail CMOS output stage capable of driving to within millivolts of V+ and V−. |
| 8 | V+ | power_in | Positive supply pin. Operating range +2.7 V to +5.5 V single-supply (or ±1.35 V to ±2.75 V split-supply). Absolute maximum total supply +7 V. Bypass with a 0.1 µF ceramic capacitor to V−. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Op-amp/Cmp |
| Pins | 8 |

## Ordering variants

- `OPA2335AIDR`
- `OPA2335AIDRAIDGKT`
- `OPA2335AIDRAIDGKR`

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS |  | 1 | 5 | µV | VCM = VS/2 | 3 |
| Offset Voltage Drift vs Temperature | dVOS/dT | -0.05 | 0.02 | 0.05 | µV/°C |  | 3 |
| Power Supply Rejection | PSRR | -2 | 1 | 2 | µV/V | VS = +2.7V to +5.5V, VCM = 0, Over Temperature | 3 |
| Input Bias Current | IB | -200 | 70 | 200 | pA | VCM = VS/2 | 3 |
| Input Bias Current | IB |  |  | 1 | nA | Over Temperature | 3 |
| Input Offset Current | IOS | -400 | 120 | 400 | pA |  | 3 |
| Common-Mode Rejection Ratio | CMRR | 110 | 130 |  | dB | (V–) – 0.1V < VCM < (V+) – 1.5V, Over Temperature | 3 |
| Open-Loop Voltage Gain | AOL | 110 | 130 |  | dB | 50mV < VO < (V+) – 50mV, RL = 100kΩ, VCM = VS/2 | 3 |
| Open-Loop Voltage Gain, Over Temperature | AOL | 110 | 130 |  | dB | Over Temperature, 100mV < VO < (V+) – 100mV, RL = 10kΩ, VCM = VS/2 | 3 |
| Voltage Output Swing from Rail |  |  | 15 | 100 | mV | RL = 10kΩ, Over Temperature | 3 |
| Voltage Output Swing from Rail |  |  | 1 | 50 | mV | RL = 100kΩ, Over Temperature | 3 |
| Short-Circuit Current | ISC | -50 |  | 50 | mA |  | 3 |
| Operating Voltage Range |  | 2.7 |  | 5.5 | V |  | 3 |
| Quiescent Current (OPA2335, total of two amplifiers) | IQ |  | 570 | 700 | µA | IO = 0 | 3 |
| Quiescent Current (OPA2335, total of two amplifiers), Over Temperature | IQ |  |  | 900 | µA | Over Temperature | 3 |
| Specified Temperature Range |  | -40 |  | 125 | °C |  | 3 |
| Operating Temperature Range |  | -40 |  | 150 | °C |  | 3 |
| Storage Temperature Range |  | -65 |  | 150 | °C |  | 3 |
| Thermal Resistance, junction-to-ambient (SO-8) | θJA |  | 150 |  | °C/W | MSOP-8, MSOP-10, SO-8 surface-mount | 3 |
| Supply Voltage |  |  |  | 7 | V |  | 2 |
| Signal Input Terminals Voltage |  | -0.5 |  |  | V | Referenced to supply rails; maximum is (V+) + 0.5V | 2 |
| Signal Input Terminals Current |  | -10 |  | 10 | mA |  | 2 |
| Operating Temperature |  | -40 |  | 150 | °C |  | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Junction Temperature |  |  |  | 150 | °C |  | 2 |
| Lead Temperature (soldering) |  |  |  | 300 | °C | Soldering, 10s | 2 |

## CAD (KiCad official)

- Symbol: `OPA2335AIDR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `opa2335aidr-etched.step` / `opa2335aidr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `opa2335aidr.step` / `opa2335aidr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/opa2335a.pdf) (None pp, sha256 `e4fe35a5d54f0e39`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/opa2335aidr-datasheet.pdf)