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Name Last commit message Last updated
docs opa2197idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
opa2197idr-etched.fit.json opa2197idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2197idr-etched.glb opa2197idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2197idr-etched.step opa2197idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago
opa2197idr.glb Publish 0.1.0 · Ray 1mo ago
opa2197idr.kicad_mod Publish 0.1.0 · Ray 1mo ago
opa2197idr.kicad_sym Publish 0.1.0 · Ray 1mo ago
opa2197idr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
opa2197idr.step Publish 0.1.0 · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
page.json opa2197idr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 18h ago
README.md opa2197idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 5d ago

OPA2197IDR

Texas Instruments · Precision OpAmps · SOIC-8

OPA2197IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of amplifier channel A. Rail-to-rail output stage capable of sourcing/sinking up to ±65 mA and driving up to 1 nF capacitive load.
2 -IN A input Inverting input of amplifier channel A. Rail-to-rail input range extending 100 mV beyond each supply; low input bias current (±5 pA typical).
3 +IN A input Non-inverting input of amplifier channel A. Rail-to-rail input range with EMI/RFI filtering; supports differential input voltage to the supply rail.
4 V- power_in Negative (lowest) power supply. Operates with dual supplies of ±2.25 V to ±18 V or single supply of 4.5 V to 36 V (referenced to V+). Quiescent current ~1 mA per amplifier.
5 +IN B input Non-inverting input of amplifier channel B. Rail-to-rail input range with EMI/RFI filtering; supports differential input voltage to the supply rail.
6 -IN B input Inverting input of amplifier channel B. Rail-to-rail input range extending 100 mV beyond each supply; low input bias current (±5 pA typical).
7 OUT B output Output of amplifier channel B. Rail-to-rail output stage capable of sourcing/sinking up to ±65 mA and driving up to 1 nF capacitive load.
8 V+ power_in Positive (highest) power supply. Operates with dual supplies of ±2.25 V to ±18 V or single supply of 4.5 V to 36 V. Absolute maximum supply span is 40 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Op-amp/Cmp
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • OPA2197IDR
  • OPA2197IDRIDGKR
  • OPA2197IDRIDGK

CAD (KiCad official)

  • Symbol: OPA2197IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa2197idr-etched.step / opa2197idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa2197idr.step / opa2197idr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
opa2197idr.step 122 KB You want the bare part, or you mark your own boards.
opa2197idr-etched.step 1.9 MB You want the part with OPA2197IDR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 479 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (56 pp, sha256 27653a7d5e965cbb, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF