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OPA1654AIDR

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Texas Instruments Precision OpAmps, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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page.json opa1654aidr: white body in tscircuit (pre-1.8 etch structure under an assembly instance); Ray 2026-10-19: black IC body… · Ray 12d ago
README.md opa1654aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago

OPA1654AIDR

Texas Instruments · Precision OpAmps · SOIC-14

OPA1654AIDR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT_A output Output of amplifier channel A. Rail-to-rail output swings to within 800 mV of the supply rails with a 2-kΩ load; ±30 mA drive capability, ±50 mA short-circuit current.
2 -IN_A input Inverting input of amplifier channel A. FET input with typical ±10 pA input bias current; input voltage range (V-)+0.5 V to (V+)-2 V.
3 +IN_A input Non-inverting input of amplifier channel A. FET input with typical ±10 pA input bias current; input voltage range (V-)+0.5 V to (V+)-2 V.
4 V+ power_in Positive supply rail. Operates from ±2.25 V to ±18 V bipolar, or +4.5 V to +36 V single-supply relative to V-. Absolute maximum (V+)-(V-) = 40 V. Quiescent current ≈2 mA per channel.
5 +IN_B input Non-inverting input of amplifier channel B. FET input, ±10 pA typical bias.
6 -IN_B input Inverting input of amplifier channel B. FET input, ±10 pA typical bias.
7 OUT_B output Output of amplifier channel B. Rail-to-rail output within 800 mV of rails with 2-kΩ load; ±30 mA drive, ±50 mA short-circuit.
8 OUT_C output Output of amplifier channel C. Rail-to-rail output within 800 mV of rails with 2-kΩ load; ±30 mA drive, ±50 mA short-circuit.
9 -IN_C input Inverting input of amplifier channel C. FET input, ±10 pA typical bias.
10 +IN_C input Non-inverting input of amplifier channel C. FET input, ±10 pA typical bias.
11 V- power_in Negative supply rail. Operates from ±2.25 V to ±18 V bipolar, or ground for single-supply operation up to +36 V. Absolute maximum (V+)-(V-) = 40 V.
12 +IN_D input Non-inverting input of amplifier channel D. FET input, ±10 pA typical bias.
13 -IN_D input Inverting input of amplifier channel D. FET input, ±10 pA typical bias.
14 OUT_D output Output of amplifier channel D. Rail-to-rail output within 800 mV of rails with 2-kΩ load; ±30 mA drive, ±50 mA short-circuit.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Op-amp/Cmp
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • OPA1654AIDR
  • OPA1654AIDRIPWR
  • OPA1654AIDRIPW

CAD (KiCad official)

  • Symbol: OPA1654AIDR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: opa1654aidr-etched.step / opa1654aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa1654aidr.step / opa1654aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 625e72eb505829b8, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF