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OPA145IDR

Public Made by Adom

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Texas Instruments FET Input Amplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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OPA145IDR

Texas Instruments · FET Input Amplifiers · SOIC-8

OPA145IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; this pin can be left floating.
2 -IN input Inverting input of the amplifier.
3 +IN input Noninverting input of the amplifier; the input-voltage range includes the V- supply rail.
4 V- power_in Negative (lowest) power supply; in single-supply use this is the ground reference, and the input range extends down to it.
5 NC unconnected No internal connection; this pin can be left floating.
6 OUT output Amplifier output, which swings rail-to-rail.
7 V+ power_in Positive (highest) power supply; recommended single-supply range is 4.5 V to 36 V (page 4).
8 NC unconnected No internal connection; this pin can be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input offset voltage (RTI), 25°C VOS -150 40 150 μV VS = ±18 V 6
Input offset voltage (RTI), 0°C to +85°C VOS -280 280 μV VS = ±18 V, TA = 0°C to +85°C 6
Input offset voltage (RTI), -40°C to +125°C VOS -350 350 μV VS = ±18 V, TA = –40°C to +125°C 6
Offset voltage drift, OPA145ID (D) package dVOS/dT -1 0.4 1 μV/°C VS = ±18 V, TA = 0°C to +85°C, OPA145ID and OPA145IDGK packages 6
Offset voltage drift, OPA145ID (D) package dVOS/dT -1.4 0.5 1.4 μV/°C VS = ±18 V, TA = –40°C to +125°C, OPA145ID and OPA145IDGK packages 6
Power-supply rejection ratio, OPA145ID package PSRR -0.3 0.06 0.3 μV/V VS = ±2.25 V to ±18 V, OPA145ID package 6
Power-supply rejection ratio, over temperature PSRR -2 2 μV/V VS = ±2.25 V to ±18 V, TA = –40°C to +125°C, OPA145 6
Input bias current, 25°C IB -10 2 10 pA 6
Input bias current, 0°C to +85°C IB -600 600 pA TA = 0°C to +85°C 6
Input bias current, -40°C to +125°C IB -10 10 nA TA = –40°C to +125°C 6
Input offset current, 25°C IOS -10 2 10 pA 6
Input offset current, 0°C to +85°C IOS -600 600 pA TA = 0°C to +85°C 6
Input offset current, -40°C to +125°C IOS -10 10 nA TA = –40°C to +125°C 6
Common-mode rejection ratio CMRR 126 140 dB VS = ±18 V, VCM = (V–) –0.1 V to (V+) – 3.5 V 6
Common-mode rejection ratio, over temperature CMRR 118 dB VS = ±18 V, VCM = (V–) –0.1 V to (V+) – 3.5 V, TA = –40°C to +125°C 6
Open-loop voltage gain, OPA145ID package AOL 118 123 dB VO = (V–) + 0.35 V to (V+) – 0.35 V, RL = 10 kΩ, OPA145ID package only 7
Open-loop voltage gain, RL = 2 kΩ AOL 106 110 dB VO = (V–) + 0.35 V to (V+) – 0.35 V, RL = 2 kΩ 7
Open-loop voltage gain, RL = 2 kΩ, over temperature AOL 104 dB VO = (V–) + 0.35 V to (V+) – 0.35 V, RL = 2 kΩ, TA = –40°C to +125°C 7
Short-circuit current ISC -20 20 mA 7
Voltage output swing from rail, RL = 10 kΩ VO 75 mV RL = 10 kΩ 7
Voltage output swing from rail, RL = 10 kΩ, over temperature VO 90 mV RL = 10 kΩ, TA = –40°C to +125°C 7
Voltage output swing from rail, RL = 2 kΩ VO 210 mV RL = 2 kΩ 7
Voltage output swing from rail, RL = 2 kΩ, over temperature, OPA145ID VO 250 mV RL = 2 kΩ, TA = –40°C to +125°C, OPA145ID 7
Quiescent current (per amplifier), 25°C IQ 445 475 µA IO = 0 mA 7
Quiescent current (per amplifier), 0°C to +85°C IQ 590 µA TA = 0°C to +85°C 7
Quiescent current (per amplifier), -40°C to +125°C IQ 655 µA TA = –40°C to +125°C 7
Supply voltage, dual supply VS 20 V Dual supply, (V+) – (V–) 4
Supply voltage, single supply VS 40 V Single supply, (V+) – (V–) 4
Signal input pin current I -10 10 mA Signal input pins 4
Operating temperature TA -55 150 °C Operating free-air temperature 4
Junction temperature TJ 150 °C 4
Storage temperature TSTG -65 150 °C 4
Supply voltage, dual supply (recommended) VS 2.25 15 18 V Dual supply, (V+) – (V–) 4
Supply voltage, single supply (recommended) VS 4.5 30 36 V Single supply, (V+) – (V–) 4
Ambient temperature (recommended) TA -40 25 125 °C Operating free-air temperature 4
Junction-to-ambient thermal resistance, D (SOIC-8) RθJA 136 °C/W OPA145 D (SOIC) 8-pin package 5
Junction-to-case (top) thermal resistance, D (SOIC-8) RθJC(top) 74 °C/W OPA145 D (SOIC) 8-pin package 5
Junction-to-board thermal resistance, D (SOIC-8) RθJB 62 °C/W OPA145 D (SOIC) 8-pin package 5
Junction-to-top characterization parameter, D (SOIC-8) ΨJT 19.7 °C/W OPA145 D (SOIC) 8-pin package 5
Junction-to-board characterization parameter, D (SOIC-8) ΨJB 54.8 °C/W OPA145 D (SOIC) 8-pin package 5

CAD (KiCad official)

  • Symbol: OPA145IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: opa145idr-etched.step / opa145idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); opa145idr.step / opa145idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (44 pp, sha256 a78a6ed6e2b0d410, retrieved 2026-10-10, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF