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OP777ARZ-REEL7

Analog Devices · Precision Op Amps · SOIC-8

OP777ARZ-REEL7 from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connect; not internally connected.
2	-IN	input	Inverting input; protected by 500 Ω series resistor, input range from V- to within 1 V of V+.
3	+IN	input	Noninverting input; protected by 500 Ω series resistor, input range from V- to within 1 V of V+.
4	V-	power_in	Negative supply or ground in single-supply operation; supply range 3.0 V to 30 V single or ±1.5 V to ±15 V dual, 36 V absolute maximum.
5	NC	unconnected	No connect; not internally connected.
6	OUT	output	Amplifier output with rail-to-rail swing, short-circuit protected, stable with capacitive loads over 500 pF.
7	V+	power_in	Positive supply; 3.0 V to 30 V single supply, 36 V absolute maximum total supply.
8	NC	unconnected	No connect; not internally connected.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SOIC-8
Category	Amplifiers/Comparators
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Offset Voltage (OP777, +25°C < TA < +85°C), VS = 5 V	VOS		20	100	μV	+25C < TA < +85 C	2
Offset Voltage (OP777, -40°C < TA < +85°C), VS = 5 V	VOS		50	200	μV	-40°C < TA < +85 °C	2
Input Bias Current, VS = 5 V	IB		5.5	11	nA	-40°C < TA < +85 °C	2
Input Offset Current, VS = 5 V	IOS		0.1	2	nA	-40°C < TA < +85 °C	2
Input Voltage Range, VS = 5 V		0		4	V		2
Common-Mode Rejection Ratio, VS = 5 V	CMRR	104	110		dB	VCM = 0 V to 4 V	2
Large Signal Voltage Gain, VS = 5 V	AVO	300	500		V/mV	RL = 10 kΩ, VO = 0.5 V to 4.5 V	2
Offset Voltage Drift (OP777), VS = 5 V	ΔVOS/ΔT		0.3	1.3	μV/°C	-40°C < TA < +85 °C	2
Output Voltage High, VS = 5 V	VOH	4.88	4.91		V	IL = 1 mA, -40 °C to +85 °C	2
Output Voltage Low, VS = 5 V	VOL		126	140	mV	IL = 1 mA, -40 °C to +85 °C	2
Output Circuit Current, VS = 5 V	IOUT	-10		10	mA	VDROPOUT < 1 V	2
Power Supply Rejection Ratio, VS = 5 V	PSRR	120	130		dB	VS = 3 V to 30 V	2
Supply Current per Amplifier (OP777), VS = 5 V	ISY		220	270	μA	VO = 0 V	2
Supply Current per Amplifier (OP777), VS = 5 V	ISY		270	320	μA	-40°C < TA < +85 °C	2
Offset Voltage (OP777, +25°C < TA < +85°C), VS = ±15 V	VOS		30	100	μV	+25°C < TA < +85 °C	3
Offset Voltage (OP777, -40°C < TA < +85°C), VS = ±15 V	VOS		50	200	μV	-40°C < TA < +85 °C	3
Input Bias Current, VS = ±15 V	IB		5	10	nA	-40°C < TA < +85 °C	3
Input Offset Current, VS = ±15 V	IOS		0.1	2	nA	-40°C < TA < +85 °C	3
Input Voltage Range, VS = ±15 V		-15		14	V		3
Common-Mode Rejection Ratio, VS = ±15 V	CMRR	110	120		dB	VCM = -15 V to +14 V	3
Large Signal Voltage Gain, VS = ±15 V	AVO	1000	2500		V/mV	RL = 10 kΩ, VO = -14.5 V to +14.5 V	3
Offset Voltage Drift (OP777), VS = ±15 V	ΔVOS/ΔT		0.3	1.3	μV/°C	-40°C < TA < +85 °C	3
Output Voltage High, VS = ±15 V	VOH	14.9	14.94		V	IL = 1 mA, -40 °C to +85 °C	3
Output Voltage Low, VS = ±15 V	VOL		-14.94	-14.9	V	IL = 1 mA, -40 °C to +85 °C	3
Output Circuit Current, VS = ±15 V	IOUT	-30		30	mA		3
Power Supply Rejection Ratio, VS = ±15 V	PSRR	120	130		dB	VS = ±1.5 V to ±15 V	3
Supply Current per Amplifier (OP777), VS = ±15 V	ISY		300	350	μA	VO = 0 V	3
Supply Current per Amplifier (OP777), VS = ±15 V	ISY		350	400	μA	-40°C < TA < +85 °C	3
Supply Voltage				36	V		4
Storage Temperature Range (R package)		-65		150	°C		4
Junction Temperature Range (R package)		-65		150	°C		4
Lead Temperature Range (Soldering, 60 sec)				300	°C	Soldering, 60 sec	4
Electrostatic Discharge (Human Body Model)				2000	V	Human body model	4
Operating Temperature Range (OP777)		-40		85	°C		4
Single-Supply Operating Voltage		3		30	V	Single-supply operation	16
Dual-Supply Operating Voltage		-15		15	V	Dual-supply operation, ±1.5 V to ±15 V	16
Thermal Resistance, Junction-to-Ambient (8-Lead SOIC, R)	θJA		158		°C/W	8-Lead SOIC (R) package	4
Thermal Resistance, Junction-to-Case (8-Lead SOIC, R)	θJC		43		°C/W	8-Lead SOIC (R) package	4

CAD (KiCad official)

Symbol: OP777ARZ-REEL7
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: op777arz-reel7-etched.step / op777arz-reel7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); op777arz-reel7.step / op777arz-reel7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (16 pp, sha256 d32673661d910ed3, retrieved 2026-10-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF