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viewers interactive viewers · Ray 2mo ago
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op07-etched.step op07: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
OP07.adom-lbr.json OP07: validated Fusion/EAGLE library + adom-lbr hub, generated from this page's KiCad sources · Ray 2mo ago
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page.json op07: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 28d ago
README.md op07: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago

OP07

Texas Instruments · Operational Amplifier · SOIC-8

The OP07 is a precision operational amplifier with low input offset voltage (75 uV typ), low offset drift, and low noise. Internal trimming removes the need for external null components, making it a straightforward choice for high-accuracy instrumentation, active filters, and sensor signal conditioning.

Pinout

Pin Name Type Function
1 OFFSET N1 input External input offset voltage adjustment. Connect a 10-20 kΩ potentiometer between OFFSET N1 (pin 1) and OFFSET N2 (pin 8) with the wiper to V- to trim residual input offset voltage.
2 IN- input Inverting input of the operational amplifier. High-impedance bipolar input; keep source-impedance matching with IN+ to minimize offset drift from input bias current.
3 IN+ input Noninverting input of the operational amplifier. Common-mode input range typically 0 V to ±14 V at ±15 V supply; recommended VCM is -13 V to 13 V.
4 V- power_in Negative supply rail. Dual-supply range ±3 V to ±18 V; single-supply operation 6 V to 36 V referenced to V+ with V- at ground.
5 NC unconnected No internal connection. Leave floating or tie to a nearby quiet net; do not connect to any active signal.
6 OUT output Amplifier output. Continuous short-circuit safe to ground or V-; fast-ramping shorts to V+ can damage the device.
7 V+ power_in Positive supply rail. Dual-supply range ±3 V to ±18 V (max ±22 V absolute); bypass to V- with a 100 nF ceramic capacitor located close to the pin.
8 OFFSET N2 input External input offset voltage adjustment. Paired with OFFSET N1 (pin 1) across a 10-20 kΩ potentiometer whose wiper returns to V- for trimming input offset voltage.

Key specifications

Parameter Value
Type Single precision op-amp (bipolar input)
Input offset voltage 75 uV typ, 150 uV max (OP07C)
Offset voltage drift 1.3 uV/C typ
Input bias current +-2 nA typ
Supply voltage +-3 V to +-18 V
Gain-bandwidth product 0.6 MHz typ
CMRR 120 dB typ
Operating temperature 0 C to 70 C (OP07C)

Ordering variants

Same part, different packaging or reel option.

  • OP07D
  • OP07DR
  • OP07P
  • OP07PS
  • OP07PSR

CAD (KiCad official)

  • Symbol: op07.kicad_sym
  • Footprint: op07.kicad_mod
  • 3D model: SOIC-8 body from KiCad Package_SO/SOIC-8_3.9x4.9mm_P1.27mm.
  • 3D model files: op07-etched.step / op07-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); op07.step / op07.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (22 pp, sha256 fcccd15da25f7e36, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF