component
OB2532MP
Public Made by Adomby adom
OB On Bright Elec AC-DC Controllers And Regulators, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 16d ago |
| viewers | 16d ago |
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| ob2532mp-etched.step | 16d ago |
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| ob2532mp-hero.overlay.json | 16d ago |
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| README.md | 16d ago |
OB2532MP
OB On Bright Elec · AC-DC Controllers And Regulators · SOT-23-6
OB2532MP from OB On Bright Elec, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the controller. |
| 2 | GATE | output | Totem-pole gate drive output for the external power MOSFET, with VOH of 8 V (Io=20 mA), VOL of 1 V (Io=20 mA), and output clamp of 16 V. |
| 3 | CS | input | Current sense input connected to the MOSFET current sense resistor node, with over-current threshold Vth_oc of 880-940 mV and 50 kΩ input impedance. |
| 4 | INV | input | Voltage feedback input from the auxiliary winding through a resistor divider reflecting the output voltage, compared against the 2.0 V reference (Vref_EA 1.97-2.03 V), and also used for the cable drop compensation offset. |
| 5 | COMP | input | Loop compensation pin for CV stability, whose voltage sets the cable drop compensation current (I_COMP_MAX 37.5 uA at Comp=0V). |
| 6 | VDD | power_in | Power supply pin, supplied by the transformer auxiliary winding, with UVLO(ON) of 8.2-10.5 V, UVLO(OFF) of 13.5-16.0 V, VDD clamp of 27-30 V (IDD=10 mA), and OVP threshold of 26-29 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | OB On Bright Elec |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Standby Current | IDD_ST | 5 | 20 | uA | VDD=13V | 5 | |
| Operation Current | IDD_op | 2 | 3 | mA | INV=2V, CS=0V, VDD=18V | 5 | |
| VDD Under Voltage Lockout (ON) | UVLO(ON) | 8.2 | 9 | 10.5 | V | Enter VDD falling | 5 |
| VDD Under Voltage Lockout (OFF) | UVLO(OFF) | 13.5 | 14.8 | 16 | V | Exit VDD rising | 5 |
| Maximum VDD operation voltage | VDD_clamp | 27 | 28.5 | 30 | V | IDD=10mA | 5 |
| Over voltage protection threshold | OVP | 26 | 27.5 | 29 | V | Ramp VDD until gate shut down | 5 |
| Over current threshold | Vth_oc | 880 | 910 | 940 | mV | 5 | |
| IC Maximum frequency | Freq_Max | 55 | 60 | 65 | KHz | 5 | |
| Frequency shuffling range | Δf/Freq | -6 | 6 | % | 5 | ||
| Reference voltage for EA | Vref_EA | 1.97 | 2 | 2.03 | V | 5 | |
| VDD Voltage | VDD | -0.3 | V | Upper limit is VDD_clamp (symbolic, not numeric) | 2 | ||
| VDD Zener Clamp Continuous Current | 10 | mA | Continuous current | 2 | |||
| COMP Voltage | COMP | -0.3 | 7 | V | 2 | ||
| CS Input Voltage | CS | -0.3 | 7 | V | 2 | ||
| INV Input Voltage | INV | -0.3 | 7 | V | 2 | ||
| Max Operating Junction Temperature | TJ | 150 | °C | 2 | |||
| Storage Temperature | Tstg | -55 | 150 | °C | 2 | ||
| Lead Temperature (Soldering) | 260 | °C | Soldering, 10 secs | 2 | |||
| Package thermal resistance junction-to-ambient | RθJA | 200 | ℃/W | SOT23-6 | 2 | ||
| LEB time | TLEB | 625 | ns | 5 | |||
| OCP Propagation delay | Td_oc | 110 | ns | 5 | |||
| Input Impedance | ZSENSE_IN | 50 | Kohm | 5 | |||
| Soft start time | T_ss | 17 | ms | 5 | |||
| System nominal switch frequency | Freq_Nom | 50 | KHz | 5 | |||
| Startup frequency | Freq_startup | 14 | KHz | INV=0V, Comp=5V | 5 | ||
| DC gain of EA | Gain | 60 | dB | 5 | |||
| Max. Cable compensation current | I_COMP_MAX | 37.5 | uA | INV=2V, Comp=0V | 5 | ||
| Output Low Level | VOL | 1 | V | Io=20mA | 5 | ||
| Output High Level | VOH | 8 | V | Io=20mA | 5 | ||
| Output Clamp Voltage Level | V_clamp | 16 | V | 5 | |||
| Output Rising Time | T_r | 650 | nS | CL=0.5nF | 5 | ||
| Output Falling Time | T_f | 40 | nS | CL=0.5nF | 5 |
CAD (KiCad official)
- Symbol:
OB2532MP - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
ob2532mp-etched.step/ob2532mp-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ob2532mp.step/ob2532mp.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: OB On Bright Elec datasheet (10 pp, sha256
99777265e6c86538, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).