component
NX3008CBKV
Public Made by Adomby adom
Nexperia MOSFETs, SOT-666. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNX3008CBKV
Nexperia · MOSFETs · SOT-666
NX3008CBKV from Nexperia, in a SOT-666. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of TR1 (N-channel, VDS max 30 V, ID 400 mA at Tamb = 25 °C). |
| 2 | G1 | input | Gate of TR1 (N-channel); VGS rated -8 V to 8 V, threshold 0.6 V min to 1.1 V max at 250 µA. |
| 3 | D2 | passive | Drain of TR2 (P-channel, VDS max -30 V, ID -220 mA at Tamb = 25 °C). |
| 4 | S2 | passive | Source of TR2 (P-channel, VDS max -30 V, ID -220 mA at Tamb = 25 °C). |
| 5 | G2 | input | Gate of TR2 (P-channel); VGS rated -8 V to 8 V, threshold -0.6 V min to -1.1 V max at -250 µA. |
| 6 | D1 | passive | Drain of TR1 (N-channel, VDS max 30 V, ID 400 mA at Tamb = 25 °C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-666 |
| Category | Transistors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| TR1 drain-source voltage | VDS | 30 | V | Tj = 25 °C | 3 | ||
| TR1 gate-source voltage | VGS | -8 | 8 | V | Tj = 25 °C | 3 | |
| TR1 drain current | ID | 400 | mA | VGS = 4.5 V; Tamb = 25 °C | 3 | ||
| TR1 drain current | ID | 260 | mA | VGS = 4.5 V; Tamb = 100 °C | 3 | ||
| TR1 peak drain current | IDM | 1.6 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 3 | ||
| TR1 total power dissipation | Ptot | 330 | mW | Tamb = 25 °C, standard footprint | 3 | ||
| TR1 total power dissipation | Ptot | 390 | mW | Tamb = 25 °C, 1 cm2 drain pad | 3 | ||
| TR1 total power dissipation | Ptot | 1090 | mW | Tsp = 25 °C | 3 | ||
| TR2 drain-source voltage | VDS | -30 | V | Tj = 25 °C | 3 | ||
| TR2 gate-source voltage | VGS | -8 | 8 | V | Tj = 25 °C | 3 | |
| TR2 drain current | ID | -220 | mA | VGS = -4.5 V; Tamb = 25 °C | 3 | ||
| TR2 drain current | ID | -140 | mA | VGS = -4.5 V; Tamb = 100 °C | 3 | ||
| TR2 peak drain current | IDM | -0.9 | A | Tamb = 25 °C; single pulse; tp ≤ 10 µs | 3 | ||
| TR2 total power dissipation | Ptot | 330 | mW | Tamb = 25 °C, standard footprint | 3 | ||
| TR2 total power dissipation | Ptot | 390 | mW | Tamb = 25 °C, 1 cm2 drain pad | 3 | ||
| TR2 total power dissipation | Ptot | 1090 | mW | Tsp = 25 °C | 3 | ||
| Per device total power dissipation | Ptot | 500 | mW | Tamb = 25 °C | 3 | ||
| Junction temperature | Tj | -55 | 150 | °C | 3 | ||
| Ambient temperature | Tamb | -55 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| TR1 source current | IS | 400 | mA | Tamb = 25 °C | 3 | ||
| TR2 source current | IS | -220 | mA | Tamb = 25 °C | 3 | ||
| TR1 ESD voltage | VESD | 2000 | V | HBM; measured between all pins | 3 | ||
| TR2 ESD voltage | VESD | 2000 | V | HBM; measured between all pins | 3 | ||
| TR1 thermal resistance junction to ambient | Rth(j-a) | 330 | 380 | K/W | in free air, standard footprint | 6 | |
| TR1 thermal resistance junction to ambient | Rth(j-a) | 280 | 320 | K/W | in free air, 1 cm2 drain pad | 6 | |
| TR1 thermal resistance junction to solder point | Rth(j-sp) | 115 | K/W | 6 | |||
| TR2 thermal resistance junction to ambient | Rth(j-a) | 330 | 380 | K/W | in free air, standard footprint | 6 | |
| TR2 thermal resistance junction to ambient | Rth(j-a) | 280 | 320 | K/W | in free air, 1 cm2 drain pad | 6 | |
| TR2 thermal resistance junction to solder point | Rth(j-sp) | 115 | K/W | 6 | |||
| Per device thermal resistance junction to ambient | Rth(j-a) | 250 | K/W | in free air, standard footprint | 6 | ||
| TR1 drain-source breakdown voltage | V(BR)DSS | 30 | V | ID = 250 µA; VGS = 0 V; Tj = 25 °C | 8 | ||
| TR1 gate-source threshold voltage | VGSth | 0.6 | 0.9 | 1.1 | V | ID = 250 µA; VDS=VGS; Tj = 25 °C | 8 |
| TR1 drain leakage current | IDSS | 1 | µA | VDS = 30 V; VGS = 0 V; Tj = 25 °C | 8 | ||
| TR1 drain leakage current | IDSS | 10 | µA | VDS = 30 V; VGS = 0 V; Tj = 150 °C | 8 | ||
| TR1 gate leakage current | IGSS | 0.2 | 1 | µA | VGS = 8 V; VDS = 0 V; Tj = 25 °C | 8 | |
| TR1 drain-source on-state resistance | RDSon | 1 | 1.4 | Ω | VGS = 4.5 V; ID = 350 mA; Tj = 25 °C | 8 | |
| TR1 drain-source on-state resistance | RDSon | 1.8 | 2.5 | Ω | VGS = 4.5 V; ID = 350 mA; Tj = 150 °C | 8 | |
| TR1 drain-source on-state resistance | RDSon | 1.4 | 2.1 | Ω | VGS = 2.5 V; ID = 200 mA; Tj = 25 °C | 8 | |
| TR1 drain-source on-state resistance | RDSon | 2 | 2.8 | Ω | VGS = 1.8 V; ID = 10 mA; Tj = 25 °C | 8 | |
| TR2 drain-source breakdown voltage | V(BR)DSS | -30 | V | ID = -250 µA; VGS = 0 V; Tj = 25 °C | 8 | ||
| TR2 gate-source threshold voltage | VGSth | -0.6 | -0.9 | -1.1 | V | ID = -250 µA; VDS=VGS; Tj = 25 °C | 8 |
| TR2 drain leakage current | IDSS | -1 | µA | VDS = -30 V; VGS = 0 V; Tj = 25 °C | 8 | ||
| TR2 drain leakage current | IDSS | -10 | µA | VDS = -30 V; VGS = 0 V; Tj = 150 °C | 8 | ||
| TR2 gate leakage current | IGSS | -0.2 | -1 | µA | VGS = 8 V; VDS = 0 V; Tj = 25 °C | 8 | |
| TR2 drain-source on-state resistance | RDSon | 2.8 | 4.1 | Ω | VGS = -4.5 V; ID = -200 mA; Tj = 25 °C | 8 | |
| TR2 drain-source on-state resistance | RDSon | 5.3 | 6.5 | Ω | VGS = -2.5 V; ID = -10 mA; Tj = 25 °C | 8 | |
| TR2 drain-source on-state resistance | RDSon | 5.3 | 7.8 | Ω | VGS = -4.5 V; ID = -200 mA; Tj = 150 °C | 8 | |
| TR1 total gate charge | QG(tot) | 0.52 | 0.68 | nC | VDS = 15 V; ID = 400 mA; VGS = 4.5 V; Tj = 25 °C | 8 | |
| TR1 input capacitance | Ciss | 34 | 50 | pF | VDS = 15 V; f = 1 MHz; VGS = 0 V; Tj = 25 °C | 9 | |
| TR1 turn-on delay time | td(on) | 15 | 30 | ns | VDS = 20 V; RL = 250 Ω; VGS = 4.5 V; RG(ext) = 6 Ω; Tj = 25 °C | 9 | |
| TR1 turn-off delay time | td(off) | 69 | 138 | ns | VDS = 20 V; RL = 250 Ω; VGS = 4.5 V; RG(ext) = 6 Ω; Tj = 25 °C | 9 | |
| TR2 total gate charge | QG(tot) | 0.55 | 0.72 | nC | VDS = -15 V; ID = -200 mA; VGS = -4.5 V; Tj = 25 °C | 9 | |
| TR2 input capacitance | Ciss | 31 | 46 | pF | VDS = -15 V; f = 1 MHz; VGS = 0 V; Tj = 25 °C | 9 | |
| TR2 turn-on delay time | td(on) | 19 | 38 | ns | VDS = -20 V; RL = 250 Ω; VGS = -4.5 V; RG(ext) = 6 Ω; Tj = 25 °C | 9 | |
| TR2 turn-off delay time | td(off) | 65 | 130 | ns | VDS = -20 V; RL = 250 Ω; VGS = -4.5 V; RG(ext) = 6 Ω; Tj = 25 °C | 9 | |
| TR1 source-drain voltage | VSD | 0.47 | 0.85 | 1.2 | V | IS = 350 mA; VGS = 0 V; Tj = 25 °C | 9 |
| TR2 source-drain voltage | VSD | -0.47 | -0.88 | -1.2 | V | IS = -200 mA; VGS = 0 V; Tj = 25 °C | 9 |
| TR1 forward transconductance | gfs | 310 | mS | VDS = 10 V; ID = 350 mA; Tj = 25 °C | 8 | ||
| TR2 forward transconductance | gfs | 160 | mS | VDS = -10 V; ID = -200 mA; Tj = 25 °C | 8 |
CAD (KiCad official)
- Symbol:
NX3008CBKV - Footprint:
Package_TO_SOT_SMD:SOT-666 - 3D model: SOT-666 (KiCad packages3D, STEP)
- 3D model files:
nx3008cbkv-etched.step/nx3008cbkv-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nx3008cbkv.step/nx3008cbkv.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (20 pp, sha256
f016b1af77fd570c, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).