component

NV24C08DTVLT3G

Public Made by Adom

by adom

onsemi EEPROM, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentmemorynv24c08dtvlt3gfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

3D Model

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

Datasheet

Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

NV24C08DTVLT3G

onsemi · EEPROM · TSSOP-8

NV24C08DTVLT3G from onsemi, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection; leave unconnected (Table 1 lists NC as No Connect).
2 NC unconnected No internal connection; leave unconnected (Table 1 lists NC as No Connect).
3 A2 input Address input that sets the device address when cascading up to two NV24C08 devices on the bus; when not driven it is pulled LOW internally.
4 VSS power_in Ground reference for the device.
5 SDA bidirectional Serial data I/O with Schmitt trigger and noise suppression filter; open drain in transmit mode, data is acquired on the SCL positive edge and delivered on the negative edge.
6 SCL input Serial clock input from the master, with Schmitt trigger and noise suppression filter on the I2C bus input.
7 WP input Write protect input that inhibits all write operations when pulled HIGH; when not driven it is pulled LOW internally.
8 VCC power_in Power supply, 1.7 V to 5.5 V supply voltage range.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Range VCC 1.7 5.5 V 1
Storage Temperature -65 150 °C 2
Voltage on any pin with respect to Ground -0.5 6.5 V with respect to Ground 2
Read Current ICCR 0.3 mA Read, fSCL = 1 MHz 2
Write Current ICCW 0.5 mA Write 2
Standby Current ISB 1 µA All I/O Pins at GND or VCC; TA = −40°C to +85°C 2
Standby Current ISB 2 µA All I/O Pins at GND or VCC; TA = −40°C to +125°C 2
I/O Pin Leakage IL 2 µA Pin at GND or VCC 2
Input Low Voltage VIL1 -0.5 V 2.2 V ≤ VCC ≤ 5.5 V 2
Output Low Voltage VOL1 0.4 V VCC ≥ 2.2 V, IOL = 6.0 mA 2
Output Low Voltage VOL2 0.2 V VCC < 2.2 V, IOL = 2.0 mA 2
SDA I/O Pin Capacitance CIN 8 pF VIN = 0 V 3
Input Capacitance (other pins) CIN 6 pF VIN = 0 V 3
WP Input Current, Address Input Current (A2) IWP, IA 50 µA VIN < VIH, VCC = 5.5 V 3
WP Input Current, Address Input Current (A2) IWP, IA 35 µA VIN < VIH, VCC = 3.3 V 3
WP Input Current, Address Input Current (A2) IWP, IA 25 µA VIN < VIH, VCC = 1.7 V 3
WP Input Current, Address Input Current (A2) IWP, IA 2 µA VIN > VIH 3
Clock Frequency FSCL 100 kHz Standard 3
Clock Frequency FSCL 400 kHz Fast 3
Clock Frequency FSCL 1000 kHz Fast-Plus 3
START Condition Hold Time tHD:STA 4 µs Standard 3
START Condition Hold Time tHD:STA 0.6 µs Fast 3
START Condition Hold Time tHD:STA 0.26 µs Fast-Plus 3
Low Period of SCL Clock tLOW 4.7 µs Standard 3
Low Period of SCL Clock tLOW 1.3 µs Fast 3
Low Period of SCL Clock tLOW 0.5 µs Fast-Plus 3
High Period of SCL Clock tHIGH 4 µs Standard 3
High Period of SCL Clock tHIGH 0.6 µs Fast 3
High Period of SCL Clock tHIGH 0.26 µs Fast-Plus 3
START Condition Setup Time tSU:STA 4.7 µs Standard 3
START Condition Setup Time tSU:STA 0.6 µs Fast 3
START Condition Setup Time tSU:STA 0.26 µs Fast-Plus 3
Data In Setup Time tSU:DAT 250 ns Standard 3
Data In Setup Time tSU:DAT 100 ns Fast 3
Data In Setup Time tSU:DAT 50 ns Fast-Plus 3
SDA and SCL Rise Time tR 1000 ns Standard 3
SDA and SCL Rise Time tR 300 ns Fast 3
SDA and SCL Rise Time tR 120 ns Fast-Plus 3
SDA and SCL Fall Time tF 300 ns Standard 3
SDA and SCL Fall Time tF 120 ns Fast-Plus 3
STOP Condition Setup Time tSU:STO 4 µs Standard 3
STOP Condition Setup Time tSU:STO 0.6 µs Fast 3
STOP Condition Setup Time tSU:STO 0.26 µs Fast-Plus 3
Bus Free Time Between STOP and START tBUF 4.7 µs Standard 3
Bus Free Time Between STOP and START tBUF 1.3 µs Fast 3
Bus Free Time Between STOP and START tBUF 0.5 µs Fast-Plus 3
SCL Low to Data Out Valid tAA 3.5 µs Standard 3
SCL Low to Data Out Valid tAA 0.9 µs Fast 3
SCL Low to Data Out Valid tAA 0.45 µs Fast-Plus 3
Data Out Hold Time tDH 100 ns Standard 3
Data Out Hold Time tDH 50 ns Fast-Plus 3
WP Hold Time tHD:WP 2.5 µs Standard 3
WP Hold Time tHD:WP 1 µs Fast-Plus 3
Noise Pulse Filtered at SCL and SDA Inputs Ti 50 ns 3
Write Cycle Time tWR 4 ms 3
Power-up to Ready Mode tPU 0.35 ms 3

CAD (KiCad official)

  • Symbol: NV24C08DTVLT3G
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: nv24c08dtvlt3g-etched.step / nv24c08dtvlt3g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nv24c08dtvlt3g.step / nv24c08dtvlt3g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (15 pp, sha256 51ead85f2266ec9e, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF