# NUC980DK63YC

**Nuvoton Tech** · Microcontrollers (MCU/MPU/SOC) · LQFP-128(14x14)

NUC980DK63YC from Nuvoton Tech, in a LQFP-128(14x14). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | USB0_ID | input | USB0 Host/Device identification input with an internal pull-up; 1 = Device (default), 0 = Host. |
| 2 | PA.0 | bidirectional | General purpose digital I/O pin PA.0, also multiplexed as QSPI0_SS1, I2C0_SDA, UART1_RXD, EINT0, TM0_ECNT and CAN3_RXD. |
| 3 | PA.1 | bidirectional | General purpose digital I/O pin PA.1, also multiplexed as EBI_nCS2, EBI_MCLK, I2C0_SCL, UART1_TXD, EINT1, TM1_ECNT and CAN3_TXD. |
| 4 | PA.2 | bidirectional | General purpose digital I/O pin PA.2, also multiplexed as UART6_CTS, I2S_LRCK, SC0_CD, JTAG1_TDO and TM2_ECNT. |
| 5 | PA.3 | bidirectional | General purpose digital I/O pin PA.3, also multiplexed as UART6_RTS, I2S_BCLK, SC0_PWR, JTAG1_TCK and TM3_ECNT. |
| 6 | PA.4 | bidirectional | General purpose digital I/O pin PA.4, also multiplexed as UART6_RXD, I2S_DI, SC0_DAT, JTAG1_TMS and TM4_ECNT. |
| 7 | PA.5 | bidirectional | General purpose digital I/O pin PA.5, also multiplexed as UART6_TXD, I2S_DO, SC0_CLK, JTAG1_TDI and TM5_ECNT. |
| 8 | PA.6 | bidirectional | General purpose digital I/O pin PA.6, also multiplexed as EBI_nCS1, I2S_MCLK, SC0_RST and JTAG1_nTRST. |
| 9 | VDD33 | power_in | Power supply for I/O power pin (3.3 V domain per pin name). |
| 10 | VDD12 | power_in | Power supply for internal core power pin. |
| 11 | MVDD | power_in | Power supply for memory ports. |
| 12 | MVDD | power_in | Power supply for memory ports. |
| 13 | VDD12 | power_in | Power supply for internal core power pin. |
| 14 | PA.7 | bidirectional | General purpose digital I/O pin PA.7, also multiplexed as EBI_nWE, UART2_CTS and TM3_EXT. |
| 15 | PA.8 | bidirectional | General purpose digital I/O pin PA.8, also multiplexed as EBI_nRE, UART2_RTS and TM3_TGL. |
| 16 | PA.9 | bidirectional | General purpose digital I/O pin PA.9, also multiplexed as EBI_nCS0, UART2_RXD and TM2_EXT. |
| 17 | PA.10 | bidirectional | General purpose digital I/O pin PA.10, also multiplexed as EBI_ADDR10, UART2_TXD and TM2_TGL. |
| 18 | PA.11 | bidirectional | General purpose digital I/O pin PA.11, also multiplexed as EBI_ADDR9, UART8_RXD and TM4_EXT. |
| 19 | PA.12 | bidirectional | General purpose digital I/O pin PA.12, also multiplexed as EBI_ADDR8, UART8_TXD and TM4_TGL. |
| 20 | VDD33 | power_in | Power supply for I/O power pin (table name VDD33; the 128-pin figure labels this pin VDDIO). |
| 21 | PG.9 | bidirectional | General purpose digital I/O pin PG.9, also multiplexed as EBI_ADDR7, UART8_CTS, PWM13 and system configuration/power-on setting CFG.9 (internal pull-up only active during reset). |
| 22 | PG.8 | bidirectional | General purpose digital I/O pin PG.8, also multiplexed as EBI_ADDR6, UART8_RTS, PWM12 and power-on setting CFG.8 (internal pull-up only active during reset). |
| 23 | PG.7 | bidirectional | General purpose digital I/O pin PG.7, also multiplexed as EBI_ADDR5, UART5_TXD, PWM11 and power-on setting CFG.7 (internal pull-up only active during reset). |
| 24 | PG.6 | bidirectional | General purpose digital I/O pin PG.6, also multiplexed as EBI_ADDR4, UART5_RXD, PWM10 and power-on setting CFG.6 (internal pull-up only active during reset). |
| 25 | PG.5 | bidirectional | General purpose digital I/O pin PG.5, also multiplexed as EBI_ADDR12, UART5_RTS and power-on setting CFG.5 (internal pull-up only active during reset). |
| 26 | PG.3 | bidirectional | General purpose digital I/O pin PG.3, also multiplexed as EBI_ADDR3, UART2_RTS, PWM03 and power-on setting CFG.3 (internal pull-up only active during reset). |
| 27 | PG.1 | bidirectional | General purpose digital I/O pin PG.1, also multiplexed as EBI_ADDR1, UART2_TXD, PWM01 and power-on setting CFG.1 (internal pull-up only active during reset). |
| 28 | PG.0 | bidirectional | General purpose digital I/O pin PG.0, also multiplexed as EBI_ADDR0, UART2_RXD, CLK_OUT, PWM00 and power-on setting CFG.0 (internal pull-up only active during reset). |
| 29 | PB.0 | bidirectional | General purpose digital I/O pin PB.0 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR12, UART2_CTS and ADC_AIN0. |
| 30 | PB.6 | bidirectional | General purpose digital I/O pin PB.6 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR13, I2C1_SDA, I2S_LRCK, USBHL0_DM, UART7_TXD, SPI1_SS0 and ADC_AIN6. |
| 31 | PB.4 | bidirectional | General purpose digital I/O pin PB.4 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR14, I2C1_SCL, I2S_BCLK, USBHL0_DP, UART7_RXD, SPI1_CLK and ADC_AIN4. |
| 32 | AVSS | power_in | Ground pin for analog SAR-ADC. |
| 33 | AVDD33 | power_in | Power supply for analog SAR-ADC, DC 3.3 V. |
| 34 | PB.7 | bidirectional | General purpose digital I/O pin PB.7 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR15, I2C2_SDA, I2S_DI, USBHL0_DM, UART7_CTS, SPI1_MOSI and ADC_AIN7. |
| 35 | PB.5 | bidirectional | General purpose digital I/O pin PB.5 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR16, I2C2_SCL, I2S_DO, USBHL0_DP, UART7_RTS, SPI1_MISO and ADC_AIN5. |
| 36 | PB.1 | bidirectional | General purpose digital I/O pin PB.1 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR17, I2C3_SDA, I2S_MCLK, CAN2_RXD, TM0_EXT, SPI1_SS1, UART9_TXD and ADC_AIN1. |
| 37 | PB.3 | bidirectional | General purpose digital I/O pin PB.3 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR18, I2C3_SCL, EINT2, CAN2_TXD, TM0_TGL, SPI0_SS1, UART9_RXD and ADC_AIN3. |
| 38 | PB.2 | bidirectional | General purpose digital I/O pin PB.2 (supports high drive and high slew rate mode), also multiplexed as EBI_ADDR2, UART9_RTS and ADC_AIN2. |
| 39 | VBAT33 | power_in | Power supply by batteries for RTC. |
| 40 | X32_IN | input | External 32.768 kHz crystal input pin. |
| 41 | X32_OUT | output | External 32.768 kHz crystal output pin. |
| 42 | PB.8 | bidirectional | General purpose digital I/O pin PB.8, also multiplexed as EBI_ADDR11, I2C2_SCL, CAN2_RXD, UART8_TXD, SD0_nCD and TM0_EXT. |
| 43 | VDD12 | power_in | Power supply for internal core power pin. |
| 44 | PC.0 | bidirectional | General purpose digital I/O pin PC.0, also multiplexed as EBI_DATA0, I2C2_SDA, CAN2_TXD, UART8_RXD, SPI0_SS1 and TM0_TGL. |
| 45 | PC.1 | bidirectional | General purpose digital I/O pin PC.1, also multiplexed as EBI_DATA1, NAND_nCS0 and UART7_TXD. |
| 46 | PC.2 | bidirectional | General purpose digital I/O pin PC.2, also multiplexed as EBI_DATA2, NAND_nWP and UART7_RXD. |
| 47 | PC.3 | bidirectional | General purpose digital I/O pin PC.3, also multiplexed as EBI_DATA3, VCAP0_CLKO, NAND_ALE, I2C1_SCL, UART3_TXD and CAN0_RXD. |
| 48 | PC.4 | bidirectional | General purpose digital I/O pin PC.4, also multiplexed as EBI_DATA4, VCAP0_PCLK, NAND_CLE, I2C1_SDA, UART3_RXD, SPI0_MOSI and CAN0_TXD. |
| 49 | PC.5 | bidirectional | General purpose digital I/O pin PC.5, also multiplexed as EBI_DATA5, VCAP0_HSYNC, NAND_nWE, SPI0_SS0, SD0_CMD/eMMC0_CMD and UART1_TXD. |
| 50 | PC.6 | bidirectional | General purpose digital I/O pin PC.6, also multiplexed as EBI_DATA6, VCAP0_VSYNC, NAND_nRE, SC1_RST, SPI0_CLK, SD0_CLK/eMMC0_CLK and UART1_RXD. |
| 51 | PC.7 | bidirectional | General purpose digital I/O pin PC.7, also multiplexed as EBI_DATA7, VCAP0_FIELD, NAND_RDY0, SC1_CLK, SPI0_MOSI, SD0_DATA0/eMMC0_DATA0 and UART1_RTS. |
| 52 | PC.8 | bidirectional | General purpose digital I/O pin PC.8, also multiplexed as EBI_DATA8, VCAP0_DATA0, NAND_DATA0, SC1_DAT, SPI0_MISO, SD0_DATA1/eMMC0_DATA1 and UART1_CTS. |
| 53 | PC.9 | bidirectional | General purpose digital I/O pin PC.9, also multiplexed as EBI_DATA9, VCAP0_DATA1, NAND_DATA1, SC1_PWR, SD0_DATA2/eMMC0_DATA2 and UART4_TXD. |
| 54 | PC.10 | bidirectional | General purpose digital I/O pin PC.10, also multiplexed as EBI_DATA10, VCAP0_DATA2, NAND_DATA2, SC1_CD, SD0_DATA3/eMMC0_DATA3 and UART4_RXD. |
| 55 | PC.11 | bidirectional | General purpose digital I/O pin PC.11, also multiplexed as EBI_DATA11, VCAP0_DATA3, NAND_DATA3 and SC0_RST. |
| 56 | PC.12 | bidirectional | General purpose digital I/O pin PC.12, also multiplexed as EBI_DATA12, VCAP0_DATA4, NAND_DATA4, SC0_CLK, SD0_nCD and UART8_TXD. |
| 57 | PC.13 | bidirectional | General purpose digital I/O pin PC.13, also multiplexed as EBI_DATA13, VCAP0_DATA5, NAND_DATA5, SC0_DAT and UART8_RXD. |
| 58 | PC.14 | bidirectional | General purpose digital I/O pin PC.14, also multiplexed as EBI_DATA14, VCAP0_DATA6, NAND_DATA6, SC0_PWR, SPI0_MOSI and UART8_RTS. |
| 59 | PC.15 | bidirectional | General purpose digital I/O pin PC.15, also multiplexed as EBI_DATA15, VCAP0_DATA7, NAND_DATA7, SC0_CD and UART8_CTS. |
| 60 | VDD33 | power_in | Power supply for I/O power pin. |
| 61 | PD.2 | bidirectional | General purpose digital I/O pin PD.2, also multiplexed as QSPI0_SS0 (booting), UART3_TXD and TM4_EXT. |
| 62 | PD.3 | bidirectional | General purpose digital I/O pin PD.3, also multiplexed as QSPI0_CLK (booting), UART3_RXD and TM4_TGL. |
| 63 | PD.4 | bidirectional | General purpose digital I/O pin PD.4, also multiplexed as QSPI0_MOSI0 (booting), UART3_RTS and TM5_EXT. |
| 64 | VSS | power_in | Ground pin for digital circuit. |
| 65 | PD.5 | bidirectional | General purpose digital I/O pin PD.5, also multiplexed as QSPI0_MISO0 (booting), UART3_CTS and TM5_TGL. |
| 66 | PD.6 | bidirectional | General purpose digital I/O pin PD.6, also multiplexed as QSPI0_MOSI1 (booting), UART2_TXD, TM0_ECNT and CAN0_RXD. |
| 67 | PD.7 | bidirectional | General purpose digital I/O pin PD.7, also multiplexed as QSPI0_MISO1 (booting), UART2_RXD, TM1_ECNT and CAN0_TXD. |
| 68 | PD.8 | bidirectional | General purpose digital I/O pin PD.8, also multiplexed as SPI0_SS0, UART6_CTS and TM2_ECNT. |
| 69 | PD.9 | bidirectional | General purpose digital I/O pin PD.9, also multiplexed as SPI0_CLK, UART6_RTS and TM3_ECNT. |
| 70 | PD.10 | bidirectional | General purpose digital I/O pin PD.10, also multiplexed as SPI0_MOSI, UART6_TXD and TM4_ECNT. |
| 71 | PD.11 | bidirectional | General purpose digital I/O pin PD.11, also multiplexed as SPI0_MISO, UART6_RXD and TM5_ECNT. |
| 72 | PD.12 | bidirectional | General purpose digital I/O pin PD.12, also multiplexed as UART4_TXD, TM2_TGL, CAN2_RXD, PWM00 and EBI_DATA1. |
| 73 | PD.13 | bidirectional | General purpose digital I/O pin PD.13, also multiplexed as UART4_RXD, TM2_EXT, CAN2_TXD, PWM01 and EBI_DATA2. |
| 74 | PD.14 | bidirectional | General purpose digital I/O pin PD.14, also multiplexed as UART4_RTS, TM3_TGL, I2C3_SCL, CAN1_RXD, USBHL0_DM, PWM02 and EBI_DATA3. |
| 75 | PD.15 | bidirectional | General purpose digital I/O pin PD.15, also multiplexed as UART4_CTS, TM3_EXT, I2C3_SDA, CAN1_TXD, USBHL0_DP, PWM03 and EBI_DATA4. |
| 76 | PG.11 | bidirectional | General purpose digital I/O pin PG.11, also multiplexed as SPI1_SS0, TM1_TGL, CAN0_RXD, UART5_CTS, PWM10 and JTAG0_TDO. |
| 77 | PG.12 | bidirectional | General purpose digital I/O pin PG.12, also multiplexed as SPI1_CLK, TM1_EXT, CAN0_TXD, UART5_RTS, PWM11 and JTAG0_TCK. |
| 78 | PG.13 | bidirectional | General purpose digital I/O pin PG.13, also multiplexed as SPI1_MOSI, CAN1_RXD, UART5_RXD, PWM12 and JTAG0_TMS. |
| 79 | PG.14 | bidirectional | General purpose digital I/O pin PG.14, also multiplexed as SPI1_MISO, CAN1_TXD, UART5_TXD, PWM13 and JTAG0_TDI. |
| 80 | PG.15 | bidirectional | General purpose digital I/O pin PG.15, also multiplexed as SPI0_SS1, SPI1_SS1, EINT3 and JTAG0_nTRST. |
| 81 | nRESET | input | External reset input: active LOW, with an internal pull-up; sets the chip to initial state when driven low (MFP1 alternate: WDT_nRST watchdog reset output). |
| 82 | VDD12 | power_in | Power supply for internal core power pin. |
| 83 | MVDD | power_in | Power supply for memory ports. |
| 84 | MVDD | power_in | Power supply for memory ports. |
| 85 | VDD33 | power_in | Power supply for I/O power pin. |
| 86 | PF.0 | bidirectional | General purpose digital I/O pin PF.0, also multiplexed as RMII1_RXERR, SD1_CMD/eMMC1_CMD, TM0_ECNT, SC1_RST, UART7_CTS, USBHL1_DM and EBI_DATA5. |
| 87 | PF.1 | bidirectional | General purpose digital I/O pin PF.1, also multiplexed as RMII1_CRSDV, SD1_CLK/eMMC1_CLK, TM1_ECNT, SC1_CLK, UART7_RTS, USBHL1_DP and EBI_DATA6. |
| 88 | PF.2 | bidirectional | General purpose digital I/O pin PF.2, also multiplexed as RMII1_RXD1, SD1_DATA0/eMMC1_DATA0, TM2_ECNT, SC1_DAT, UART7_RXD, USBHL2_DM and EBI_DATA7. |
| 89 | PF.3 | bidirectional | General purpose digital I/O pin PF.3, also multiplexed as RMII1_RXD0, SD1_DATA1/eMMC1_DATA1, TM3_ECNT, SC1_PWR, UART7_TXD, USBHL2_DP and EBI_DATA8. |
| 90 | PF.4 | bidirectional | General purpose digital I/O pin PF.4, also multiplexed as RMII1_REFCLK, SD1_DATA2/eMMC1_DATA2, TM4_ECNT, SC1_CD, UART3_CTS, USBHL3_DM and EBI_DATA9. |
| 91 | PF.5 | bidirectional | General purpose digital I/O pin PF.5, also multiplexed as RMII1_TXEN, SD1_DATA3/eMMC1_DATA3, TM5_ECNT, PWM00, UART3_RTS, USBHL3_DP and EBI_DATA10. |
| 92 | PF.6 | bidirectional | General purpose digital I/O pin PF.6, also multiplexed as RMII1_TXD1, SD1_nCD, TM4_EXT, PWM01, UART3_RXD, USBHL4_DM and EBI_DATA11. |
| 93 | PB.13 | bidirectional | General purpose digital I/O pin PB.13, also multiplexed as EINT2, TM4_TGL, PWM02, UART3_TXD, USBHL4_DP and EBI_DATA0. |
| 94 | VDD12 | power_in | Power supply for internal core power pin. |
| 95 | VSS | power_in | Ground pin for digital circuit. |
| 96 | PF.7 | bidirectional | General purpose digital I/O pin PF.7, also multiplexed as RMII1_TXD0, UART1_CTS, TM5_EXT, PWM02, UART3_TXD, USBHL4_DP and EBI_DATA12. |
| 97 | PF.8 | bidirectional | General purpose digital I/O pin PF.8, also multiplexed as RMII1_MDIO, UART1_RTS, TM1_TGL, PWM03, USBHL5_DM and EBI_DATA13. |
| 98 | PF.9 | bidirectional | General purpose digital I/O pin PF.9, also multiplexed as RMII1_MDC, UART1_RXD, TM1_EXT, PWM10, USBHL5_DP and EBI_DATA14. |
| 99 | PF.10 | bidirectional | General purpose digital I/O pin PF.10, also multiplexed as UART1_TXD, TM5_TGL, PWM11, VCAP1_PCLK and EBI_DATA15. |
| 100 | PF.11 | bidirectional | General purpose digital I/O pin PF.11, also multiplexed as UART0_RXD. |
| 101 | PF.12 | bidirectional | General purpose digital I/O pin PF.12, also multiplexed as UART0_TXD. |
| 102 | VDD33 | power_in | Power supply for I/O power pin. |
| 103 | XT_IN | input | External 12 MHz crystal input pin. |
| 104 | XT_OUT | output | External 12 MHz crystal output pin. |
| 105 | PE.0 | bidirectional | General purpose digital I/O pin PE.0, also multiplexed as RMII0_RXERR, CAN0_RXD, UART4_CTS, USBHL1_DM and VCAP1_HSYNC. |
| 106 | PE.1 | bidirectional | General purpose digital I/O pin PE.1, also multiplexed as RMII0_CRSDV, CAN0_TXD, UART4_RTS, USBHL1_DP and VCAP1_VSYNC. |
| 107 | PE.2 | bidirectional | General purpose digital I/O pin PE.2, also multiplexed as RMII0_RXD1, CAN1_RXD, UART4_RXD, USBHL2_DM and VCAP1_DATA0. |
| 108 | PE.3 | bidirectional | General purpose digital I/O pin PE.3, also multiplexed as RMII0_RXD0, CAN1_TXD, UART4_TXD, USBHL2_DP and VCAP1_DATA1. |
| 109 | PE.4 | bidirectional | General purpose digital I/O pin PE.4, also multiplexed as RMII0_REFCLK, CAN2_RXD, UART9_CTS, USBHL3_DM and VCAP1_DATA2. |
| 110 | PE.5 | bidirectional | General purpose digital I/O pin PE.5, also multiplexed as RMII0_TXEN, CAN2_TXD, UART9_RTS, USBHL3_DP and VCAP1_DATA3. |
| 111 | PE.6 | bidirectional | General purpose digital I/O pin PE.6, also multiplexed as RMII0_TXD1, CAN3_RXD, UART9_RXD, USBHL4_DM and VCAP1_DATA4. |
| 112 | PE.7 | bidirectional | General purpose digital I/O pin PE.7, also multiplexed as RMII0_TXD0, CAN3_TXD, UART9_TXD, USBHL4_DP and VCAP1_DATA5. |
| 113 | PE.8 | bidirectional | General purpose digital I/O pin PE.8, also multiplexed as RMII0_MDIO, UART6_RXD, USBHL5_DM and VCAP1_DATA6. |
| 114 | PE.9 | bidirectional | General purpose digital I/O pin PE.9, also multiplexed as RMII0_MDC, UART6_TXD, USBHL5_DP and VCAP1_DATA7. |
| 115 | PE.10 | bidirectional | General purpose digital I/O pin PE.10, also multiplexed as USB_OVC (HSUSB host over-voltage detect), CAN3_RXD, UART9_RXD, PWM12, EINT2, I2C0_SDA and VCAP1_FIELD. |
| 116 | PE.11 | bidirectional | General purpose digital I/O pin PE.11, also multiplexed as USB0_VBUSVLD (USB0 VBUS valid indication). |
| 117 | PE.12 | bidirectional | General purpose digital I/O pin PE.12, also multiplexed as USBH_PWREN (HSUSB host power control), CAN3_TXD, UART9_TXD, PWM13, EINT3, I2C0_SCL and VCAP1_CLKO. |
| 118 | VDD12 | power_in | Power supply for internal core power pin. |
| 119 | USB1_DM | passive | USB1 differential signal D-. |
| 120 | USB1_DP | passive | USB1 differential signal D+. |
| 121 | VUSB1_VDD33 | power_in | Power supply for USB1 VDD33. |
| 122 | USB1_REXT | passive | USB1 module reference resistor pin (external 12.1 kΩ to GND). |
| 123 | VUSB0_VDD12 | power_in | Power supply for USB0 VDD12. |
| 124 | USB0_DM | passive | USB0 differential signal D-. |
| 125 | USB0_DP | passive | USB0 differential signal D+. |
| 126 | VUSB0_VDD33 | power_in | Power supply for USB0 VDD33. |
| 127 | USB0_REXT | passive | USB0 module reference resistor pin (external 12.1 kΩ to GND). |
| 128 | VSS | power_in | Ground pin for digital circuit (exposed pad, EPAD). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-128(14x14) |
| Category | Embedded Processors & Controllers |
| Pins | 128 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Core DC Power Supply (VDD12-VSS) | VDD12 | -0.3 |  | 1.5 | V |  | 206 |
| I/O DC Power Supply (VDD33-VSS) | VDD33 | -0.3 |  | 4.6 | V |  | 206 |
| I/O DC Power Supply for DDR2 Type SDRAM (MVDD-MVSS) | MVDD | -0.3 |  | 2.3 | V |  | 206 |
| Input Voltage | VIN | -0.3 |  | 5 | V | referenced to VSS | 206 |
| Ambient Operating Temperature | TA | -40 |  | 85 | C |  | 206 |
| Junction Operating Temperature | TJ | -40 |  | 125 | C |  | 206 |
| Storage Temperature | TST | -55 |  | 150 | C |  | 206 |
| Maximum Current into CORE_VDD | IDD |  |  | 200 | mA |  | 206 |
| Maximum Current out of CORE_VSS | ISS |  |  | 200 | mA |  | 206 |
| Maximum Current sunk by a I/O pin | IIO |  |  | 20 | mA |  | 206 |
| Maximum Current sourced by a I/O pin | IIO |  |  | 30 | mA |  | 206 |
| Maximum Current sunk by total I/O pins | IIO |  |  | 200 | mA |  | 206 |
| Maximum Current sourced by total I/O pins | IIO |  |  | 200 | mA |  | 206 |
| Core Operation voltage | VDD12 | 1.14 | 1.2 | 1.32 | V |  | 207 |
| I/O Operation Voltage | VDD33 | 2.97 | 3.3 | 3.63 | V |  | 207 |
| Memory I/O Operation Voltage for DDR2 | MVDD | 1.7 | 1.8 | 1.9 | V |  | 207 |
| Battery Operation Voltage | VBAT33 | 2 | 3.3 | 3.63 | V |  | 207 |
| USB Operation Voltage (1) | VUSB0_VDD12, VUSB1_VDD12 | 1.14 | 1.2 | 1.32 | V |  | 207 |
| USB Operation Voltage (2) | VUSB0_VDD33, VUSB1_VDD33 | 2.97 | 3.3 | 3.63 | V |  | 207 |
| Analog Operating Voltage | AVDD33 | 2.97 | 3.3 | 3.63 | V |  | 207 |
| Analog Reference Voltage | AVref | 0 |  |  | V |  | 207 |
| Input Leakage Current PA-PG | ILK1 | -10 |  | 10 | uA | VDD33 = 3.63V; 0V < VIN < VDD33 | 209 |
| Input Low Voltage (TTL input) | VIL1 |  |  | 0.8 | V | VDD33 = 3.63V | 209 |
| Input High Voltage (TTL input) | VIH1 | 2 |  |  | V | VDD33 = 3.63V | 209 |
| Input Pull-up Resistance | RPU |  |  | 82 | kΩ | VDD33 = 3.63V; Vin = 0V | 209 |
| Input Pull-down Resistance | RPD |  |  | 91 | kΩ | VDD33 = 3.63V; Vin = 3.63V | 209 |
| AVDD33 Operation Voltage (LVD/LVR) | AVDD33 | 2 | 3.3 | 3.63 | V |  | 231 |
| LVD/LVR Quiescent Current | ILK |  | 0.1 | 0.5 | uA | LVR_EN (SYS_LVRDCR[0]) = 0, LVD_EN (SYS_LVRDCR[8]) = 0 | 231 |
| LVD/LVR Temperature | TA | -40 |  | 85 | C |  | 231 |
| LVD Threshold Voltage | VTH_LVD | 2.295 | 2.55 | 2.805 | V | LVD_SEL (SYS_LVRDCR[9]) = 0 | 231 |
| LVD Threshold Voltage | VTH_LVD | 2.475 | 2.75 | 3.025 | V | LVD_SEL (SYS_LVRDCR[9]) = 1 | 231 |
| LVR Threshold Voltage | VTH_LVR | 2.115 | 2.35 | 2.585 | V |  | 231 |
| LVD Hysteresis | VHY_LVD | 0.045 | 0.05 | 0.055 | V | LVD_SEL (SYS_LVRDCR[9]) = 0 | 231 |
| LVR Hysteresis | VHY_LVR | 0.045 | 0.05 | 0.055 | V |  | 231 |
| Internal nRESET pin pull up resistor | RRST |  |  | 84 | KΩ | VDD33 = 3.63V; Vin = 3.63V | 214 |
| External 12MHz Crystal Operation Voltage | VHXT | 2.97 | 3.3 | 3.63 | V | VHXT = VDD33 | 210 |
| External 12MHz Crystal Temperature | TA | -40 |  | 85 | C |  | 210 |
| External 32.768 kHz Crystal Operation Voltage | VLXT | 2.97 | 3.3 | 3.63 | V | VLXT = VBAT33 | 211 |
| PLL multiplier output clock | fPLL_OUT | 25 |  | 500 | MHz |  | 214 |
| Address Setup/Active Low Time (EBI_nWE/nOE Active Low Time) | TtACC | 1 |  | 32 | THCLK |  | 215 |
| EBI_nCS Hold Time from EBI_nWE or EBI_nOE Rising Edge | TtCOH | 0 |  | 8 | THCLK |  | 215 |
| EBI_DATA Read Setup Time to EBI_nOE Rising Edge | TSU_EBI_RD | 1 |  |  | THCLK |  | 215 |
| SCL low period | tLOW | 4.7 |  |  | µs | Standard Mode | 216 |
| SCL low period | tLOW | 1.3 |  |  | µs | Fast Mode | 216 |
| SCL high period | tHIGH | 4 |  |  | µs | Standard Mode | 216 |
| SCL high period | tHIGH | 0.6 |  |  | µs | Fast Mode | 216 |
| Data setup time | tSU;DAT | 250 |  |  | ns | Standard Mode | 216 |
| Data setup time | tSU;DAT | 100 |  |  | ns | Fast Mode | 216 |
| Data hold time | tHD;DAT | 0 |  | 3.45 | µs | Standard Mode | 216 |
| Data hold time | tHD;DAT | 0 |  | 0.8 | µs | Fast Mode | 216 |
| SCL/SDA rise time | tr |  |  | 1000 | ns | Standard Mode | 216 |
| SCL/SDA rise time | tr |  |  | 300 | ns | Fast Mode | 216 |
| SCL/SDA fall time | tf |  |  | 300 | ns | Standard Mode | 216 |
| Thermal resistance junction to ambient (LQFP 128L, 14x14, JEDEC 2S2P 4-layers) | θja |  | 38.5 |  | ℃/W | 0 m/s airflow | 238 |
| Thermal resistance junction to ambient (LQFP 128L, 14x14, JEDEC 2S2P 4-layers) | θja |  | 33.8 |  | ℃/W | 1 m/s airflow | 238 |
| Thermal resistance junction to ambient (LQFP 128L, 14x14, JEDEC 2S2P 4-layers) | θja |  | 32 |  | ℃/W | 2 m/s airflow | 238 |
| Thermal resistance junction to case (LQFP 128L, 14x14, JEDEC 2S2P 4-layers) | θjc |  | 9.9 |  | ℃/W | JEDEC 2S2P (4-layers) | 238 |

## CAD (KiCad official)

- Symbol: `NUC980DK63YC`
- Footprint: `Package_QFP:LQFP-128_14x14mm_P0.4mm`
- 3D model: LQFP-128(14x14) (KiCad packages3D, STEP)
- 3D model files: `nuc980dk63yc-etched.step` / `nuc980dk63yc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nuc980dk63yc.step` / `nuc980dk63yc.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Nuvoton Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835602742185984) (246 pp, sha256 `18f189812eb1ac0a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nuc980dk63yc-datasheet.pdf)