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NUC123LD4AE0
Public Made by Adomby adom
Nuvoton Tech Microcontroller Units (MCUs/MPUs/SOCs), LQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNUC123LD4AE0
Nuvoton Tech · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-48(7x7)
NUC123LD4AE0 from Nuvoton Tech, in a LQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PVSS | power_in | PLL ground. |
| 2 | PB.8 | bidirectional | Digital GPIO pin, or TM0 Timer0 event counter input / toggle output. |
| 3 | PB.14 | bidirectional | Digital GPIO pin, or INT0 external interrupt 0 input. |
| 4 | PA.11 | bidirectional | Digital GPIO pin, or SPI1_CLK, SPI2_MOSI0 or I2C1_SCL. |
| 5 | PA.10 | bidirectional | Digital GPIO pin, or SPI1_MISO0, SPI2_MISO0 or I2C1_SDA. |
| 6 | PB.4 | bidirectional | Digital GPIO pin, or UART1_RXD input, SPI2_SS0 or SPI1_SS1. |
| 7 | PB.5 | bidirectional | Digital GPIO pin, or UART1_TXD output or SPI2_CLK. |
| 8 | PB.6 | bidirectional | Digital GPIO pin, or UART1_nRTS output or SPI2_MOSI0. |
| 9 | PB.7 | bidirectional | Digital GPIO pin, or UART1_nCTS input or SPI2_MISO0. |
| 10 | LDO_CAP | power_out | LDO output pin. |
| 11 | VDD | power_in | Power supply for I/O ports and LDO source for internal PLL and digital function; voltage range 2.5V ~ 5V. |
| 12 | VSS | power_in | Ground. |
| 13 | USB_VBUS | power_in | USB power supply from USB host or hub. |
| 14 | USB_VDD33_CAP | power_out | USB internal power regulator output 3.3V decoupling pin. |
| 15 | USB_D- | bidirectional | USB differential signal D-. |
| 16 | USB_D+ | bidirectional | USB differential signal D+. |
| 17 | PC.5 | bidirectional | Digital GPIO pin, or SPI0_MOSI1 or UART0_TXD output. |
| 18 | PC.4 | bidirectional | Digital GPIO pin, or SPI0_MISO1 or UART0_RXD input. |
| 19 | PC.3 | bidirectional | Digital GPIO pin, or SPI0_MOSI0 or I2S_DO data output. |
| 20 | PC.2 | bidirectional | Digital GPIO pin, or SPI0_MISO0 or I2S_DI data input. |
| 21 | PC.1 | bidirectional | Digital GPIO pin, or SPI0_CLK or I2S_BCLK bit clock. |
| 22 | PC.0 | bidirectional | Digital GPIO pin, or SPI0_SS0 or I2S_LRCLK left/right channel clock. |
| 23 | PB.10 | bidirectional | Digital GPIO pin, or SPI0_SS1 or TM2 Timer2 event counter input / toggle output. |
| 24 | PB.9 | bidirectional | Digital GPIO pin, or SPI1_SS1, TM1 Timer1 event counter input / toggle output, or PWM1 (NUC123xxxAEx only). |
| 25 | PC.13 | bidirectional | Digital GPIO pin, or SPI1_MOSI1, PWM3 or CLKO frequency divider output. |
| 26 | PC.12 | bidirectional | Digital GPIO pin, or SPI1_MISO1, PWM2 or I2S_MCLK master clock output. |
| 27 | PC.11 | bidirectional | Digital GPIO pin, or SPI1_MOSI0. |
| 28 | PC.10 | bidirectional | Digital GPIO pin, or SPI1_MISO0. |
| 29 | PC.9 | bidirectional | Digital GPIO pin, or SPI1_CLK. |
| 30 | PC.8 | bidirectional | Digital GPIO pin, or SPI1_SS0 or PWM0 (NUC123xxxAEx only). |
| 31 | PA.15 | bidirectional | Digital GPIO pin, or PWM3, I2S_MCLK master clock output or CLKO frequency divider output. |
| 32 | PA.14 | bidirectional | Digital GPIO pin, or PWM2 output / capture input. |
| 33 | PA.13 | bidirectional | Digital GPIO pin, or PWM1 output / capture input. |
| 34 | PA.12 | bidirectional | Digital GPIO pin, or PWM0 output / capture input. |
| 35 | ICE_DAT | bidirectional | Serial wired debugger data pin; a 100 kΩ pull-up resistor is recommended. |
| 36 | ICE_CLK | input | Serial wired debugger clock input pin; a 100 kΩ pull-up resistor is recommended. |
| 37 | AVDD | power_in | Power supply for internal analog circuit. |
| 38 | PD.0 | bidirectional | Digital GPIO pin, or ADC0 analog input or SPI2_SS0. |
| 39 | PD.1 | bidirectional | Digital GPIO pin, or SPI2_CLK, SPI0_SS1 or ADC1 analog input. |
| 40 | PD.2 | bidirectional | Digital GPIO pin, or SPI2_MISO0, SPI0_MISO1 or ADC2 analog input. |
| 41 | PD.3 | bidirectional | Digital GPIO pin, or SPI2_MOSI0, SPI0_MOSI1 or ADC3 analog input. |
| 42 | PD.4 | bidirectional | Digital GPIO pin, or ADC4 analog input or SPI2_MISO1. |
| 43 | PD.5 | bidirectional | Digital GPIO pin, or ADC5 analog input or SPI2_MOSI1. |
| 44 | PF.0 | bidirectional | Digital GPIO pin, or XT1_OUT external 4~24 MHz high speed crystal output. |
| 45 | PF.1 | bidirectional | Digital GPIO pin, or XT1_IN external 4~24 MHz high speed crystal input. |
| 46 | nRESET | input | External reset input, low active, resets chip to initial state, with internal pull-up; a 10 kΩ pull-up resistor and 10 μF capacitor are recommended. |
| 47 | PF.2 | bidirectional | Digital GPIO pin, or ADC6 analog input, I2C0_SDA or PS2_DAT. |
| 48 | PF.3 | bidirectional | Digital GPIO pin, or ADC7 analog input, I2C0_SCL or PS2_CLK. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nuvoton Tech |
| Package | LQFP-48(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 48 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Power Supply | VDD-VSS | -0.3 | 7 | V | 82 | ||
| Oscillator Frequency | 1/tCLCL | 4 | 24 | MHz | 82 | ||
| Operating Temperature | TA | -40 | 105 | °C | 82 | ||
| Storage Temperature | TST | -55 | 150 | °C | 82 | ||
| Maximum Current into VDD | IDD | 120 | mA | 82 | |||
| Maximum Current out of VSS | ISS | 120 | mA | 82 | |||
| Maximum Current sunk by a I/O pin | IIO | 35 | mA | 82 | |||
| Maximum Current sourced by a I/O pin | IIO | 35 | mA | 82 | |||
| Maximum Current sunk by total I/O pins | IIO | 100 | mA | 82 | |||
| Maximum Current sourced by total I/O pins | IIO | 100 | mA | 82 | |||
| Operation voltage | VDD | 2.5 | 5.5 | V | VDD = 2.5V ~ 5.5V up to 72 MHz | 83 | |
| VDD rise rate to ensure internal operation correctly | VRISE | 0.05 | V/ms | 83 | |||
| Power ground | VSS/AVSS | -0.3 | V | 83 | |||
| LDO output voltage | VLDO | 1.62 | 1.8 | 1.98 | V | VDD > 2.5V | 83 |
| Analog operating voltage | AVDD | 0 | V | max is VDD | 83 | ||
| Source Current quasi-bidirectional | ISR11 | -300 | -370 | -450 | μA | VDD = 4.5V, VS = 2.4V | 86 |
| Source Current quasi-bidirectional | ISR12 | -50 | -70 | -90 | μA | VDD = 2.7V, VS = 2.2V | 86 |
| Source Current push-pull | ISR21 | -24 | -28 | -32 | mA | VDD = 4.5V, VS = 2.4V | 86 |
| Source Current push-pull | ISR22 | -4 | -6 | -8 | mA | VDD = 2.7V, VS = 2.2V | 86 |
| Sink Current quasi-bidirectional and push-pull | ISK1 | 10 | 16 | 20 | mA | VDD = 4.5V, VS = 0.45V | 86 |
| Sink Current quasi-bidirectional and push-pull | ISK1 | 7 | 10 | 13 | mA | VDD = 2.7V, VS = 0.45V | 86 |
| Brown-out voltage | VBO2.2 | 2.1 | 2.2 | 2.3 | V | BOV_VL [1:0] =00b | 86 |
| Brown-out voltage | VBO2.7 | 2.6 | 2.7 | 2.8 | V | BOV_VL [1:0] =01b | 86 |
| Brown-out voltage | VBO3.8 | 3.5 | 3.7 | 3.9 | V | BOV_VL [1:0] =10b | 86 |
| Brown-out voltage | VBO4.5 | 4.2 | 4.4 | 4.6 | V | BOV_VL [1:0] =11b | 86 |
| Hysteresis range of BOD voltage | VBH | 30 | 150 | mV | VDD = 2.5V - 5.5V | 86 | |
| Input clock frequency (external crystal) | 4 | 24 | MHz | External crystal | 87 | ||
| Crystal temperature | -40 | 105 | °C | 87 | |||
| Crystal oscillator VDD | VDD | 2.5 | 5.5 | V | 87 | ||
| Clock High Time | tCHCX | 10 | ns | 87 | |||
| Clock Rise Time | tCLCH | 2 | 15 | ns | 87 | ||
| Internal 22.1184 MHz oscillator frequency accuracy | -1 | 1 | % | +25°C; VDD =5 V | 88 | ||
| Internal 22.1184 MHz oscillator frequency accuracy | -3 | 3 | % | -40°C~+105°C; VDD=2.5 V~5.5 V | 88 | ||
| Internal 10 kHz oscillator frequency accuracy | -30 | 30 | % | +25°C; VDD =5 V | 88 | ||
| Internal 10 kHz oscillator frequency accuracy | -50 | 50 | % | -40°C~+105°C; VDD=2.5 V~5.5 V | 88 | ||
| ADC Operating voltage | AVDD | 2.7 | 5.5 | V | AVDD = VDD | 89 | |
| LDO input voltage | 2.5 | 5 | 5.5 | V | VDD input voltage | 89 | |
| LDO output voltage | 1.62 | 1.8 | 1.98 | V | VDD > 2.5V | 89 | |
| LVR threshold voltage | 1.7 | 2 | 2.3 | V | Temperature = 25°C | 90 | |
| LVR quiescent current | 5 | μA | VDD = 5.5 V | 90 | |||
| BOD quiescent current | 125 | μA | AVDD = 5.5 V | 90 | |||
| USB input high (driven) | VIH | 2 | V | 91 | |||
| USB input low | VIL | 0.8 | V | 91 | |||
| USB differential input sensitivity | VDI | 0.2 | V | /PADP-PADM/ | 91 | ||
| USB differential common-mode range | VCM | 0.8 | 2.5 | V | Includes VDI range | 91 | |
| USB single-ended receiver threshold | VSE | 0.8 | 2 | V | 91 | ||
| USB output low (driven) | VOL | 0 | 0.3 | V | 91 | ||
| USB output high (driven) | VOH | 2.8 | 3.6 | V | 91 | ||
| USB output signal cross voltage | VCRS | 1.3 | 2 | V | 91 | ||
| USB pull-up resistor | RPU | 1.425 | 1.575 | kΩ | 91 | ||
| USB pull-down resistor | RPD | 14.25 | 15.75 | kΩ | 91 | ||
| USB termination voltage for upstream port pull up | VTRM | 3 | 3.6 | V | 91 | ||
| USB rising time | TFR | 4 | 20 | ns | CL = 50p | 91 | |
| USB falling time | TFF | 4 | 20 | ns | CL = 50p | 91 | |
| USB LDO VBUS pin input voltage | VBUS | 4 | 5 | 5.5 | V | 92 | |
| USB LDO output voltage | VDD33 | 3 | 3.3 | 3.6 | V | 92 | |
| Flash supply voltage | VDD | 1.62 | 1.8 | 1.98 | V | 93 | |
| Flash power down current | IPD | 1 | 20 | μA | 93 | ||
| SPI master data output valid time | tV | 7 | 11 | ns | SPI Master mode, VDD = 4.5V ~ 5.5V, 30pF loading Capacitor | 94 |
CAD (KiCad official)
- Symbol:
NUC123LD4AE0 - Footprint:
Package_QFP:LQFP-48_7x7mm_P0.5mm - 3D model: LQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
nuc123ld4ae0-etched.step/nuc123ld4ae0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nuc123ld4ae0.step/nuc123ld4ae0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nuvoton Tech datasheet (100 pp, sha256
4155f3be31484ab1, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).