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NTS4101PT1G

Public Made by Adom

by adom

onsemi MOSFETs, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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page.json nts4101pt1g: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 24d ago
README.md nts4101pt1g: specified limits as data (metadata.characteristics, 28 rows from the datasheet) · Ray 24d ago

NTS4101PT1G

onsemi · MOSFETs · SOT-323

NTS4101PT1G from onsemi, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate of the P-channel MOSFET; the datasheet limits gate-to-source voltage to ±8 V (VGS) and gives VGS(TH) of −0.45 V to −1.5 V.
2 S passive Source of the P-channel MOSFET; the datasheet rates continuous source (body diode) current IS at −0.5 A.
3 D passive Drain of the P-channel MOSFET; the datasheet rates drain-to-source voltage VDSS at −20 V and continuous drain current ID at −1.37 A (TA = 25°C).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-323
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-to-Source Voltage VDSS -20 V 1
Gate-to-Source Voltage VGS -8 8 V 1
Continuous Drain Current ID -1.37 A Steady state, TA = 25°C 1
Continuous Drain Current ID -0.62 A Steady state, TA = 70°C 1
Power Dissipation PD 0.329 W Steady state, TA = 25°C (Note 1) 1
Pulsed Drain Current IDM -4 A tp = 10 s 1
Operating Junction and Storage Temperature TJ, TSTG -55 150 °C 1
Source Current (Body Diode), Continuous IS -0.5 A 1
Lead Temperature for Soldering Purposes TL 260 °C 1/8 in from case for 10 s 1
Junction-to-Ambient Thermal Resistance, Steady State RJA 380 °C/W Steady state, surface-mounted on FR4, 1 in sq pad (Note 1) 1
Drain-to-Source Breakdown Voltage V(BR)DSS -20 -24.5 V VGS = 0 V, ID = −250 A 2
Zero Gate Voltage Drain Current IDSS -1 A VGS = 0 V, VDS = −16 V, TJ = 25°C 2
Zero Gate Voltage Drain Current IDSS -5 A VGS = 0 V, VDS = −16 V, TJ = 70°C 2
Gate-to-Source Leakage Current IGSS -100 100 nA VDS = 0 V, VGS = ±8 V 2
Gate Threshold Voltage VGS(TH) -0.45 -0.64 -1.5 V VGS = VDS, ID = −250 A 2
Drain-to-Source On Resistance RDS(on) 83 120 m VGS = −4.5 V, ID = −1.0 A 2
Drain-to-Source On Resistance RDS(on) 88 130 m VGS = −3.6 V, ID = −0.7 A 2
Drain-to-Source On Resistance RDS(on) 104 160 m VGS = −2.5 V, ID = −0.3 A 2
Input Capacitance CISS 603 840 pF VGS = 0 V, f = 1.0 MHz, VDS = −20 V 2
Output Capacitance COSS 90 125 pF VGS = 0 V, f = 1.0 MHz, VDS = −20 V 2
Reverse Transfer Capacitance CRSS 62 85 pF VGS = 0 V, f = 1.0 MHz, VDS = −20 V 2
Total Gate Charge QG(TOT) 6.4 9 nC VGS = −4.5 V, VDS = −4.5 V, ID = −1.0 A 2
Turn-On Delay Time td(ON) 6.2 12 ns VGS = −4.5 V, VDD = −4.0 V, ID = −1.0 A, RG = 6.2 2
Rise Time tr 14.9 25 ns VGS = −4.5 V, VDD = −4.0 V, ID = −1.0 A, RG = 6.2 2
Turn-Off Delay Time td(OFF) 26 40 ns VGS = −4.5 V, VDD = −4.0 V, ID = −1.0 A, RG = 6.2 2
Fall Time tf 18 30 ns VGS = −4.5 V, VDD = −4.0 V, ID = −1.0 A, RG = 6.2 2
Forward Diode Voltage VSD -0.61 -1.2 V VGS = 0 V, IS = −0.3 A, TJ = 25°C 2
Reverse Recovery Time tRR 10.9 20 ns VGS = 0 V, dISD/dt = 100 A/s, IS = −1.0 A 2

CAD (KiCad official)

  • Symbol: NTS4101PT1G
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323 (KiCad packages3D, STEP)
  • 3D model files: nts4101pt1g-etched.step / nts4101pt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nts4101pt1g.step / nts4101pt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (5 pp, sha256 f141ab1ad5d5d5e2, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF