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Contents

README

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NTP30N06LG-VB

VBsemi Elec · MOSFETs · TO-220AB

NTP30N06LG-VB from VBsemi Elec, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate-source voltage is rated ±20 V, and VGS = 5 V is used for logic-level devices, with VGS = 10 V giving the specified RDS(on) of 0.024 Ω.
2 D passive Drain-source voltage is rated 60 V, with continuous drain current of 50 A at TC = 25 °C, limited by the package (die current 51 A).
3 S passive Source is the MOSFET source terminal; continuous source-drain diode current is 50 A and pulsed diode forward current is 200 A.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package TO-220AB
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 60 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 50 A VGS at 10 V, TC = 25 °C 1
Continuous Drain Current ID 36 A TC = 100 °C 1
Pulsed Drain Current IDM 200 A 1
Single Pulse Avalanche Energy EAS 400 mJ 1
Maximum Power Dissipation PD 150 W TC = 25 °C 1
Maximum Power Dissipation (PCB Mount) PD 3.7 W TA = 25 °C 1
Peak Diode Recovery dV/dt dV/dt 4.5 V/ns 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 175 °C 1
Soldering Recommendations (Peak Temperature) 300 °C for 10 s, 1.6 mm from case 1
Maximum Junction-to-Ambient RthJA 62 °C/W 2
Maximum Junction-to-Ambient (PCB Mount) RthJA 40 °C/W PCB mount 2
Drain-Source Breakdown Voltage V(BR)DSS 60 V VGS = 0, ID = 250 μA 2
Gate-Source Threshold Voltage VGS(th) 1 2.5 V VDS = VGS, ID = 250 μA 2
Gate-Source Leakage IGSS -100 100 nA VGS = ± 10 V 2
Zero Gate Voltage Drain Current IDSS 25 μA VDS = 60 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 250 μA VDS = 48 V, VGS = 0 V, TJ = 150 °C 2
Forward Transconductance gfs 23 S VDS = 25 V, ID = 21 A 2
Total Gate Charge Qg 66 nC ID = 51 A, VDS = 48 V, VGS = 5.0 V 2
Gate-Source Charge Qgs 12 nC ID = 51 A, VDS = 48 V, VGS = 5.0 V 2
Gate-Drain Charge Qgd 43 nC ID = 51 A, VDS = 48 V, VGS = 5.0 V 2
Continuous Source-Drain Diode Current IS 50 A 2
Pulsed Diode Forward Current ISM 200 A 2
Body Diode Voltage VSD 2.5 V TJ = 25 °C, IS = 51 A, VGS = 0 V 2
Body Diode Reverse Recovery Time trr 130 180 ns TJ = 25 °C, IF = 51 A, dI/dt = 100 A/μs 2
Body Diode Reverse Recovery Charge Qrr 0.84 1.3 μC TJ = 25 °C, IF = 51 A, dI/dt = 100 A/μs 2
Drain-Source On-State Resistance RDS(on) 0.024 Ω VGS = 10 V, ID = 21 A 2
Drain-Source On-State Resistance RDS(on) 0.028 Ω VGS = 4.5 V, ID = 15 A 2
VDS Temperature Coefficient VDS/TJ 0.07 V/°C Reference to 25 °C, ID = 1 mA 2
Input Capacitance Ciss 190 pF VGS = 0 V, VDS = 25 V, f = 1.0 MHz 2
Turn-On Delay Time td(on) 17 ns VDD = 30 V, ID = 51 A, Rg = 4.6 Ω, RD = 0.56 Ω 2
Rise Time tr 230 ns VDD = 30 V, ID = 51 A, Rg = 4.6 Ω, RD = 0.56 Ω 2
Fall Time tf 110 ns VDD = 30 V, ID = 51 A, Rg = 4.6 Ω, RD = 0.56 Ω 2
Internal Drain Inductance LD 4.5 nH Between lead, 6 mm (0.25") from package and center of die contact 2
Internal Source Inductance LS 7.5 nH 2
Linear Derating Factor 1 W/°C 1
Linear Derating Factor (PCB Mount) 0.025 W/°C 1

CAD (KiCad official)

  • Symbol: NTP30N06LG-VB
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220AB (KiCad packages3D, STEP)
  • 3D model files: ntp30n06lg-vb-etched.step / ntp30n06lg-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ntp30n06lg-vb.step / ntp30n06lg-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 c7502e4fb3a46ccf, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF