component
NTMS4177PR2G
Public Made by Adomby adom
onsemi MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NTMS4177PR2G
onsemi · MOSFETs · SOIC-8
NTMS4177PR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 2 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 3 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 4 | GATE | input | MOSFET gate terminal; the datasheet limits gate-to-source voltage to VGS ±20 V. |
| 5 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 6 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 7 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 8 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
NTMS4177PR2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ntms4177pr2g-etched.step/ntms4177pr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ntms4177pr2g.step/ntms4177pr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (5 pp, sha256
e88a5c1ca64cd744, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NTMS4177PR2G
**onsemi** · MOSFETs · SOIC-8
NTMS4177PR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 2 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 3 | SOURCE | passive | MOSFET source terminal (STYLE 12 pin assignment); the datasheet gives the device's source current limit IS -2.1 A (body diode) and VDSS -30 V, but no pin-specific limit. |
| 4 | GATE | input | MOSFET gate terminal; the datasheet limits gate-to-source voltage to VGS ±20 V. |
| 5 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 6 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 7 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
| 8 | DRAIN | passive | MOSFET drain terminal; the datasheet limits drain-to-source voltage to VDSS -30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `NTMS4177PR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ntms4177pr2g-etched.step` / `ntms4177pr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ntms4177pr2g.step` / `ntms4177pr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586188030247493632) (5 pp, sha256 `e88a5c1ca64cd744`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ntms4177pr2g-datasheet.pdf)