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NSQA6V8AW5T2G

Leiditech · ESD And Surge Protection (TVS/ESD) · SOT-353

NSQA6V8AW5T2G from Leiditech, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 passive ESD-protected line 1 of the quad array, rated for 5V reverse working voltage and ±30kV air / ±25kV contact ESD per IEC 61000-4-2.
2 GND power_in Common ground node shared by the steering diodes and the internal zener of the array; connect to circuit ground.
3 I/O2 passive ESD-protected line 2 of the quad array, rated for 5V reverse working voltage and ±30kV air / ±25kV contact ESD per IEC 61000-4-2.
4 I/O3 passive ESD-protected line 3 of the quad array, rated for 5V reverse working voltage and ±30kV air / ±25kV contact ESD per IEC 61000-4-2.
5 I/O4 passive ESD-protected line 4 of the quad array, rated for 5V reverse working voltage and ±30kV air / ±25kV contact ESD per IEC 61000-4-2.

Key specifications

Parameter Value
Manufacturer Leiditech
Package SOT-353
Category Circuit Protection
Pins 5

CAD (KiCad official)

  • Symbol: NSQA6V8AW5T2G
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: nsqa6v8aw5t2g-etched.step / nsqa6v8aw5t2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nsqa6v8aw5t2g.step / nsqa6v8aw5t2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Leiditech datasheet (4 pp, sha256 ab6bf7fdf1938dae, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF