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NSi8241W1-DSWWR

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NOVOSENSE Digital Isolators, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NSi8241W1-DSWWR

NOVOSENSE · Digital Isolators · SOP-16

NSi8241W1-DSWWR from NOVOSENSE, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Power supply for isolator side 1; recommended supply range is 2.5V to 5.5V.
2 GND1 power_in Ground 1, the ground reference for isolator side 1.
3 INA input Logic input A on side 1; VIH is 2V minimum and VIL is 0.8V maximum.
4 INB input Logic input B on side 1; VIH is 2V minimum and VIL is 0.8V maximum.
5 INC input Logic input C on side 1; VIH is 2V minimum and VIL is 0.8V maximum.
6 OUTD output Logic output D on side 2.
7 NC/EN1 input No connection, or output enable 1: active-high input; when high or NC the side 1 output is enabled, and when low the side 1 output is disabled to high impedance.
8 GND1 power_in Ground 1, the ground reference for isolator side 1.
9 GND2 power_in Ground 2, the ground reference for isolator side 2.
10 EN2 input Output enable 2: active-high input; when high or NC the side 2 output is enabled, and when low the side 2 output is disabled to high impedance.
11 IND input Logic input D on side 1.
12 OUTC output Logic output C on side 2.
13 OUTB output Logic output B on side 2.
14 OUTA output Logic output A on side 2.
15 GND2 power_in Ground 2, the ground reference for isolator side 2.
16 VDD2 power_in Power supply for isolator side 2; recommended supply range is 2.5V to 5.5V.

Key specifications

Parameter Value
Manufacturer NOVOSENSE
Package SOP-16
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Voltage VDD1, VDD2 -0.5 6.5 V 4
Output current Io -15 15 mA 4
Maximum Surge Isolation Voltage VIOSM 6.25 kV 4
Operating Temperature Topr -40 125 °C 4
Storage Temperature Tstg -40 150 °C 4
Electrostatic discharge HBM HBM -8000 8000 V 4
Electrostatic discharge CDM CDM -2000 2000 V 4
Common-Mode Transients CMTI -200 200 kV/us 4
Power Supply Voltage VDD1, VDD2 2.5 5.5 V 4
Operating Temperature Topr -40 125 °C 4
High Level Input Voltage VIH 2 V 4
Low Level Input Voltage VIL 0.8 V 4
Data rate DR 150 Mbps 4
Power on Reset VDDPOR 2.2 V POR threshold as during power-up 5
POR threshold Hysteresis VDD HYS 0.1 V 5
Input Threshold VIT 1.6 V Input Threshold at rising edge 5
Input Threshold Hysteresis VIT_HYS 0.4 V 5
High Level Input Voltage VIH 2 V 5
Low Level Input Voltage VIL 0.8 V 5
Low Level Output Voltage VOL 0.4 V IOL = 4mA 5
Output Impedance Rout 50 ohm 5
Input Pull high or low Current Ipull 8 15 uA 5
Start Up Time after POR trbs 10 us 5
Common Mode Transient Immunity CMTI 150 200 kV/us See Figure 5.11, CL = 15pF 5
Supply current (5V, NSi8241) IDD1(Q0) 1.53 2.295 mA All Input 0V for NSi8241x0 Or All Input at supply for NSi8241x1 6
Supply current (5V, NSi8241) IDD2(Q0) 2.23 3.345 mA All Input 0V for NSi8241x0 Or All Input at supply for NSi8241x1 6
Supply current (5V, NSi8241) IDD1(Q1) 4.86 7.29 mA All Input at supply for NSi8241x0 Or All Input 0V for NSi8241x1 6
Supply current (5V, NSi8241) IDD2(Q1) 3.38 5.07 mA All Input at supply for NSi8241x0 Or All Input 0V for NSi8241x1 6
Data Rate (5V) DR 0 150 Mbps 9
Minimum Pulse Width (5V) PW 5 ns 10
Propagation Delay (5V) tPLH 2.5 6.54 15 ns See Figure 5.9, CL = 15pF 10
Propagation Delay (5V) tPHL 2.5 8.3 15 ns See Figure 5.9, CL = 15pF 10
Pulse Width Distortion (5V) /tPHL, tPLH/ 5 ns See Figure 5.9, CL = 15pF 10
Rising Time (5V) tr 5 ns See Figure 5.9, CL = 15pF 10
Falling Time (5V) tf 5 ns See Figure 5.9, CL = 15pF 10
Peak Eye Diagram Jitter (5V) tJIT(PK) 350 ps 10
Channel-to-Channel Delay Skew (5V) tSK(c2c) 2.5 ns 10
Part-to-Part Delay Skew (5V) tSK(p2p) 5 ns 10
Disable high to Tri-State (5V) tPHZ 10 25 ns See Figure 5.10, CL = 15pF, RL=1k 10
Enable to Data high Valid (5V) tPZH 8.3 25 ns See Figure 5.10, CL = 15pF, RL=1k 10
Disable low to Tri-State (5V) tPLZ 10.2 25 ns See Figure 5.10, CL = 15pF, RL=1k 10
Enable to Data high Valid (5V) tPZL 8.6 25 ns See Figure 5.10, CL = 15pF, RL=1k 10
Thermal resistance junction-to-air (SOP16 600mil) θJA 78.9 °C/W SOP16(600mil) 5
Junction-to-case (top) thermal resistance (SOP16 600mil) θJC(top) 41.1 °C/W SOP16(600mil) 5
Junction-to-board thermal resistance (SOP16 600mil) θJB 49.5 °C/W SOP16(600mil) 5

CAD (KiCad official)

  • Symbol: NSi8241W1-DSWWR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: nsi8241w1-dswwr-etched.step / nsi8241w1-dswwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nsi8241w1-dswwr.step / nsi8241w1-dswwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: NOVOSENSE datasheet (25 pp, sha256 2046f592b2ed1e5b, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF