component
NSI8140W0
Public Made by Adomby adom
NOVOSENSE Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 13d ago |
| viewers | 13d ago |
| nsi8140w0-etched.glb | 13d ago |
| nsi8140w0-etched.step | 13d ago |
| nsi8140w0-hero.glb | 13d ago |
| nsi8140w0-hero.overlay.json | 13d ago |
| nsi8140w0.glb | 13d ago |
| nsi8140w0.kicad_mod | 13d ago |
| nsi8140w0.kicad_sym | 13d ago |
| nsi8140w0.lbr | 13d ago |
| nsi8140w0.step | 13d ago |
| package.json | 13d ago |
| page.json | 13d ago |
| README.md | 13d ago |
NSI8140W0
NOVOSENSE · Digital Isolators · SOIC-16-300mil
NSI8140W0 from NOVOSENSE, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD1 | power_in | Power supply for isolator side 1, specified from 2.5 V to 5.5 V, with a 0.1 µF bypass capacitor to GND1 required close to the package. |
| 2 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 3 | INA | input | Logic input A on side 1, with VIH minimum 2 V and VIL maximum 0.8 V. |
| 4 | INB | input | Logic input B on side 1, with VIH minimum 2 V and VIL maximum 0.8 V. |
| 5 | INC | input | Logic input C on side 1, with VIH minimum 2 V and VIL maximum 0.8 V. |
| 6 | IND | input | Logic input D on side 1, with VIH minimum 2 V and VIL maximum 0.8 V. |
| 7 | NC/EN1 | input | Output enable 1, an active high logic input; when EN1 is low the side 1 outputs go to high impedance, and when EN1 is high or the pin is not connected the side 1 outputs are enabled. |
| 8 | GND1 | power_in | Ground 1, the ground reference for isolator side 1. |
| 9 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 10 | EN2 | input | Output enable 2, an active high logic input; when EN2 is low the side 2 outputs are disabled to high impedance, and when EN2 is high or the pin is not connected they are enabled. |
| 11 | OUTD | output | Logic output D, with VOH minimum VDD-0.3 V at IOH = -4 mA and VOL maximum 0.3 V at IOL = 4 mA. |
| 12 | OUTC | output | Logic output C, with VOH minimum VDD-0.3 V at IOH = -4 mA and VOL maximum 0.3 V at IOL = 4 mA. |
| 13 | OUTB | output | Logic output B, with VOH minimum VDD-0.3 V at IOH = -4 mA and VOL maximum 0.3 V at IOL = 4 mA. |
| 14 | OUTA | output | Logic output A, with VOH minimum VDD-0.3 V at IOH = -4 mA and VOL maximum 0.3 V at IOL = 4 mA. |
| 15 | GND2 | power_in | Ground 2, the ground reference for isolator side 2. |
| 16 | VDD2 | power_in | Power supply for isolator side 2, specified from 2.5 V to 5.5 V, with a 0.1 µF bypass capacitor to GND2 required close to the package. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NOVOSENSE |
| Package | SOIC-16-300mil |
| Category | Signal Isolation Devices |
| Pins | 16 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | pC | In accordance with DIN VDE V 0884-11, each NSi8140N/NSi8141N/NSi8142N is proof tested by applying an insulation test voltage ≥ 847 V peak for 1 sec (partial discharge detection limit = 5 pC). The * ma | 14 |
CAD (KiCad official)
- Symbol:
NSI8140W0 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
nsi8140w0-etched.step/nsi8140w0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nsi8140w0.step/nsi8140w0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NOVOSENSE datasheet (24 pp, sha256
2b3812b6e5a434fb, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).