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Initial commit: component/nsi6601b-dspr

Ray ·1267e96ca4 ·1mo ago
2 files changed +185
README.mdadded+44
@@ -0,0 +1,44 @@+# NSi6601B-DSPR++**NOVOSENSE** · Isolators - Gate Drivers · SOP-8-150mil++NSi6601B-DSPR from NOVOSENSE, in a SOP-8-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC1 | power_in | Input-side supply voltage (3.1V to 17V operating range); UVLO rising threshold 3.1V. |+| 2 | IN+ | input | Non-inverted input signal with internal pull-down to GND1; logic high threshold 0.7×VCC1, low threshold 0.3×VCC1. |+| 3 | IN- | input | Inverted input signal with internal pull-up to VCC1; logic high threshold 0.7×VCC1, low threshold 0.3×VCC1. |+| 4 | GND1 | power_in | Input-side ground reference for VCC1 and input signal return paths. |+| 5 | VCC2 | power_in | Positive output supply voltage (10V to 32V for NSi6601B); UVLO rising threshold 10V. |+| 6 | OUT+ | output | Driver source output with 5A peak source current capability; high-level output voltage VCC2-0.14V minimum. |+| 7 | OUT- | output | Driver sink output with 5A peak sink current capability; low-level output voltage 30mV to 60mV above VEE2. |+| 8 | VEE2 | power_in | Negative output supply rail and reference for output stage UVLO and active pull-down functionality. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | NOVOSENSE |+| Package | SOP-8-150mil |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `NSi6601B-DSPR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8-150mil (KiCad packages3D, STEP)+- 3D model files: `nsi6601b-dspr-etched.step` / `nsi6601b-dspr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nsi6601b-dspr.step` / `nsi6601b-dspr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [NOVOSENSE datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903773986840576) (25 pp, sha256 `e10f25930789ecdb`, retrieved 2026-09-21, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/nsi6601b-dspr-datasheet.pdf)
page.jsonadded+141
@@ -0,0 +1,141 @@+{+  "slug": "nsi6601b-dspr",+  "version": "0.1.0",+  "type": "component",+  "description": "NOVOSENSE Isolators - Gate Drivers, SOP-8-150mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "nsi6601b-dspr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "nsi6601b-dspr.kicad_sym",+    "nsi6601b-dspr.kicad_mod",+    "nsi6601b-dspr.glb",+    "nsi6601b-dspr.step",+    "nsi6601b-dspr.lbr",+    "docs/hero.png",+    "docs/nsi6601b-dspr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "NSi6601B-DSPR",+    "manufacturer": "NOVOSENSE",+    "package": "SOP-8-150mil",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "Isolators - Gate Drivers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903773986840576",+    "parts": {+      "symbol": "nsi6601b-dspr.kicad_sym",+      "footprint": "nsi6601b-dspr.kicad_mod",+      "model_3d": "nsi6601b-dspr-etched.glb",+      "model_3d_plain": "nsi6601b-dspr.glb",+      "model_3d_step": "nsi6601b-dspr-etched.step",+      "model_3d_step_plain": "nsi6601b-dspr.step",+      "lbr": "nsi6601b-dspr.lbr"+    },+    "distributor_links": {+      "lcsc": "C5307513"+    },+    "pins": [+      {+        "number": "1",+        "name": "VCC1",+        "type": "power_in",+        "description": "Input-side supply voltage (3.1V to 17V operating range); UVLO rising threshold 3.1V."+      },+      {+        "number": "2",+        "name": "IN+",+        "type": "input",+        "description": "Non-inverted input signal with internal pull-down to GND1; logic high threshold 0.7×VCC1, low threshold 0.3×VCC1."+      },+      {+        "number": "3",+        "name": "IN-",+        "type": "input",+        "description": "Inverted input signal with internal pull-up to VCC1; logic high threshold 0.7×VCC1, low threshold 0.3×VCC1."+      },+      {+        "number": "4",+        "name": "GND1",+        "type": "power_in",+        "description": "Input-side ground reference for VCC1 and input signal return paths."+      },+      {+        "number": "5",+        "name": "VCC2",+        "type": "power_in",+        "description": "Positive output supply voltage (10V to 32V for NSi6601B); UVLO rising threshold 10V."+      },+      {+        "number": "6",+        "name": "OUT+",+        "type": "output",+        "description": "Driver source output with 5A peak source current capability; high-level output voltage VCC2-0.14V minimum."+      },+      {+        "number": "7",+        "name": "OUT-",+        "type": "output",+        "description": "Driver sink output with 5A peak sink current capability; low-level output voltage 30mV to 60mV above VEE2."+      },+      {+        "number": "8",+        "name": "VEE2",+        "type": "power_in",+        "description": "Negative output supply rail and reference for output stage UVLO and active pull-down functionality."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 25,+        "cost_usd": 0.1433,+        "at": "2026-09-21T15:27:43"+      },+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590903773986840576",+        "pages": 25,+        "sha256": "e10f25930789ecdb",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file