# NSG6000R

**WXNSIC** · Gate Drivers · SOP-8

NSG6000R from WXNSIC, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply pin, recommended operating range 10 V to 20 V, absolute maximum -0.3 V to 25 V, with UVLO thresholds of 8.7 V rising and 7.7 V falling. |
| 2 | HIN | input | High-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, and input voltage range 0 V to VCC. |
| 3 | LIN | input | Low-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, and input voltage range 0 V to VCC. |
| 4 | VSS | power_in | Ground reference pin to which all voltage ratings of the device are referenced. |
| 5 | LO | output | Low-side gate drive output, with output voltage range 0 V to VCC in recommended operation and absolute limits of -0.3 V to VCC + 0.3 V. |
| 6 | VS | power_in | High-side floating ground reference, with recommended range -9 V to 600 V and absolute limits of VB - 25 V to VB + 0.3 V. |
| 7 | HO | output | High-side gate drive output referenced to VS, with absolute limits of VS - 0.3 V to VB + 0.3 V. |
| 8 | VB | power_in | High-side floating supply, recommended at VS + 10 V to VS + 20 V, with absolute maximum of -0.3 V to 650 V referenced to VSS. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | SOP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating supply voltage VB (absolute maximum) | VB | -0.3 |  | 650 | V |  | 5 |
| Low-side supply voltage VCC (absolute maximum) | VCC | -0.3 |  | 25 | V |  | 5 |
| Low-side output voltage VLO (absolute maximum; max printed as VCC+0.3) | VLO | -0.3 |  |  | V |  | 5 |
| Logic input voltage VIN (absolute maximum; max printed as VCC+0.3) | VIN | -0.3 |  |  | V |  | 5 |
| Allowable transient VS slew rate dVS/dt | dVS/dt |  |  | 50 | V/ns |  | 5 |
| ESD rating, human body model | ESD | 1500 |  |  | V |  | 5 |
| ESD rating, machine model | ESD | 500 |  |  | V |  | 5 |
| SOP package power dissipation | PD1 |  |  | 625 | mW | TA ≤25°C | 5 |
| Junction temperature TJ (absolute maximum) | TJ |  |  | 150 | °C |  | 5 |
| Storage temperature TS | TS | -55 |  | 150 | °C |  | 5 |
| Lead temperature TL (unit printed as °C/W) | TL |  |  | 300 | °C/W |  | 5 |
| Thermal resistance junction-to-ambient RthJA | RthJA |  |  | 200 | °C/W |  | 5 |
| High-side floating ground VS (recommended) | VS | -9 |  | 600 | V |  | 5 |
| Low-side supply voltage VCC (recommended) | VCC | 10 |  | 20 | V |  | 5 |
| Low-side output voltage VLO (recommended; max printed as VCC) | VLO | 0 |  |  | V |  | 5 |
| Logic input voltage VIN (recommended; max printed as VCC) | VIN | 0 |  |  | V |  | 5 |
| Ambient temperature TA (recommended) | TA | -40 |  | 125 | °C |  | 5 |
| Turn-on propagation delay | tON |  | 250 | 200 | ns | VS=0V | 6 |
| Turn-off propagation delay | tOFF |  | 150 | 200 | ns | VS=600V | 6 |
| Dead time | DT |  | 540 | 680 | ns |  | 6 |
| Propagation delay mismatch Max(ton,toff)-min(ton,toff) | MDT |  |  | 60 | ns |  | 6 |
| Delay matching time (tON, tOFF) | MT |  |  | 50 | ns |  | 6 |
| VCC undervoltage positive-going threshold | VCCUV+ | 7.7 | 8.7 | 9.7 | V |  | 6 |
| VCC undervoltage negative-going threshold | VCCUV- | 6.7 | 7.7 | 8.7 | V |  | 6 |
| VBS undervoltage positive-going threshold | VBSUV+ | 7.2 | 8.2 | 9.2 | V |  | 6 |
| VBS undervoltage negative-going threshold | VBSUV- | 6.3 | 7.3 | 8.3 | V |  | 6 |
| High-side floating supply leakage current ILK | ILK |  |  | 50 | μA | VB=VS=600V | 6 |
| VBS quiescent current | IQBS |  | 50 | 100 | μA | 输入悬空 | 6 |
| VCC quiescent current | IQCC |  | 100 | 220 | μA | 输入悬空 | 6 |
| Input logic high threshold voltage | VIH | 2.5 |  |  | V | VCC=10Vto 20V | 6 |
| Input logic low threshold voltage | VIL |  |  | 0.8 | V | VCC=10Vto 20V | 6 |
| Output high-level voltage drop (VBIAS - VO) | VOH |  |  | 0.2 | V | IO=0A | 6 |
| Output low-level voltage drop | VOL |  |  | 0.2 | V | IO=0A | 6 |
| Logic '1' input bias current | IIN+ |  | 25 | 60 | μA | HIN=5V, LIN=5V | 6 |
| Logic '0' input bias current | IIN- |  |  | 5 | μA | HIN=0V, LIN=0V | 6 |

## CAD (KiCad official)

- Symbol: `NSG6000R`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `nsg6000r-etched.step` / `nsg6000r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nsg6000r.step` / `nsg6000r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [WXNSIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604432173848285184) (9 pp, sha256 `0bf51f10b9939852`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nsg6000r-datasheet.pdf)