NSG4437

{
  "slug": "nsg4437",
  "version": "0.1.0",
  "type": "component",
  "description": "WXNSIC Power Distribution Switches, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "nsg4437",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "nsg4437.kicad_sym",
    "nsg4437.kicad_mod",
    "nsg4437.glb",
    "nsg4437.step",
    "nsg4437.lbr",
    "docs/hero.png",
    "docs/nsg4437-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "nsg4437-hero.glb",
    "nsg4437-hero.overlay.json",
    "nsg4437-etched.glb"
  ],
  "component": {
    "mpn": "NSG4437",
    "manufacturer": "WXNSIC",
    "package": "SOP-8",
    "pin_count": 8,
    "category": "Power Management (PMIC)",
    "subcategory": "Power Distribution Switches",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604432177606111232",
    "parts": {
      "symbol": "nsg4437.kicad_sym",
      "footprint": "nsg4437.kicad_mod",
      "model_3d": "nsg4437-hero.glb",
      "model_3d_plain": "nsg4437-etched.glb",
      "model_3d_step": "nsg4437-etched.step",
      "model_3d_step_plain": "nsg4437.step",
      "lbr": "nsg4437.lbr"
    },
    "distributor_links": {
      "lcsc": "C53436466"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T01:17:17Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "NC",
        "type": "unconnected",
        "description": "Pin 1 is a no-connect (空引脚) and is not bonded to any internal function."
      },
      {
        "number": "2",
        "name": "INA",
        "type": "input",
        "description": "Channel A logic input with VIH minimum 2.4 V, VIL maximum 0.8 V, and an absolute range of -10 V to VCC+0.3 V; tie to GND when unused."
      },
      {
        "number": "3",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference for all voltage parameters, which the datasheet specifies relative to GND."
      },
      {
        "number": "4",
        "name": "INB",
        "type": "input",
        "description": "Channel B logic input with VIH minimum 2.4 V, VIL maximum 0.8 V, and an absolute range of -10 V to VCC+0.3 V; tie to GND when unused."
      },
      {
        "number": "5",
        "name": "OUTB",
        "type": "output",
        "description": "Channel B gate-drive output, in phase with INB, that sources and sinks 2 A peak and withstands up to 0.5 A reverse current without latch-up."
      },
      {
        "number": "6",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply pin with recommended range 4.5 V to 20 V and absolute maximum 25 V referenced to GND."
      },
      {
        "number": "7",
        "name": "OUTA",
        "type": "output",
        "description": "Channel A gate-drive output, in phase with INA, that sources and sinks 2 A peak and withstands up to 0.5 A reverse current without latch-up."
      },
      {
        "number": "8",
        "name": "SD",
        "type": "input",
        "description": "Active-high shutdown input that forces both OUTA and OUTB low when high; it has an internal 100 kΩ pull-down to GND and may be left floating or tied to GND when unused."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Pin table (section 7, Table 7-1 and Figure 7-1) gives the SOP-8 pin assignment; the datasheet's orde; Section 10.5 refers to the shutdown pin as 'EN' and the ground as 'VSS', which do not match the prin; Section 10.4 describes the input ports as having a pull-up resistor to GND, which is an unusual word"
        ],
        "pages_sent": 12,
        "cost_usd": 0.0401,
        "at": "2026-10-18T01:16:23"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604432177606111232",
        "pages": 12,
        "sha256": "0f9e738378f1e141",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "nsg4437.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "nsg4437-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          4.9,
          1.75
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "361d9923886fb1a8f2a9b1a14cfb63c56639d9eacb6cd1758cd76369a22f801a",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}