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NSG2106
Public Made by Adomby adom
WXNSIC Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownNSG2106
WXNSIC · Gate Drivers · SOIC-8
NSG2106 from WXNSIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply pin, recommended 10 V to 20 V (absolute maximum -0.3 V to 25 V), with UVLO thresholds of 8.9 V rising and 8.2 V falling (typical). |
| 2 | HIN | input | High-side logic input compatible with 3.3 V, 5 V and 15 V logic, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 3 | LIN | input | Low-side logic input compatible with 3.3 V, 5 V and 15 V logic, with VIH minimum 2.5 V and VIL maximum 0.8 V. |
| 4 | VSS | power_in | Ground reference for all voltage ratings, logic inputs and outputs of the device. |
| 5 | LO | output | Low-side gate driver output referenced to VSS, rated for 300 mA source and 600 mA sink (pulse width of 10 µs or less), with absolute maximum VCC + 0.3 V. |
| 6 | VS | power_in | High-side floating ground reference, recommended -9 V to 700 V, tolerating transients down to -9 V and dVS/dt up to ±50 V/ns. |
| 7 | HO | output | High-side gate driver output referenced to VS, with the same 300 mA source and 600 mA sink capability (pulse width of 10 µs or less) as LO. |
| 8 | VB | power_in | High-side floating bootstrap supply, recommended VS + 10 V to VS + 20 V, with absolute maximum -0.3 V to 725 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Low-side supply voltage | VCC | -0.3 | 25 | V | 5 | ||
| High-side floating supply voltage | VB | -0.3 | 725 | V | 5 | ||
| Allowable transient VS slew rate | dVS/dt | 50 | V/ns | 5 | |||
| ESD human body model | ESD | 1500 | V | 5 | |||
| SOIC package power dissipation | PD1 | 625 | mW | TA ≤25°C | 5 | ||
| Thermal resistance junction to ambient | RthJA | 200 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -55 | 150 | °C | 5 | ||
| Lead temperature | TL | 300 | °C/W | 5 | |||
| High-side floating ground voltage | VS | -9 | 700 | V | 5 | ||
| Low-side supply voltage | VCC | 10 | 20 | V | 5 | ||
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Turn-on propagation delay | tON | 130 | 200 | ns | VS=0V | 6 | |
| Turn-off propagation delay | tOFF | 130 | 200 | ns | VS=700V | 6 | |
| Turn-on rise time | tR | 75 | 130 | ns | 6 | ||
| Turn-off fall time | tF | 35 | 70 | ns | 6 | ||
| Dead time | DT | 80 | 100 | 190 | ns | 6 | |
| Delay matching time (tON, tOFF) | MT | 50 | ns | 6 | |||
| Delay matching time (tON, tOFF) (second table row) | MT | 60 | ns | 6 | |||
| VCC undervoltage positive-going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | 6 | |
| VCC undervoltage negative-going threshold | VCCUV- | 7.4 | 8.2 | 9 | V | 6 | |
| VBS undervoltage positive-going threshold | VBSUV+ | 8 | 8.9 | 9.8 | V | 6 | |
| VBS undervoltage negative-going threshold | VBSUV- | 7.4 | 8.2 | 9 | V | 6 | |
| High-side floating supply leakage current | ILK | 50 | μA | VB=VS=700V | 6 | ||
| VBS quiescent current | IQBS | 50 | 100 | μA | VIN=0V or 5V | 6 | |
| VCC quiescent current | IQCC | 120 | 240 | μA | VIN=0V or 5V | 6 | |
| Input logic high threshold voltage | VIH | 2.5 | V | VCC=10Vto 20V | 6 | ||
| Input logic low threshold voltage | VIL | 0.8 | V | VCC=10Vto 20V | 6 | ||
| Output high-level voltage drop (VBIAS - VO) | VOH | 0.1 | V | IO=0A | 6 | ||
| Output low-level voltage drop | VOL | 0.1 | V | IO=0A | 6 | ||
| Logic '1' input bias current | IIN+ | 5 | 10 | μA | HIN=5V, LIN=5V | 6 | |
| Logic '0' input bias current | IIN- | 2 | μA | HIN=0V, LIN=0V | 6 | ||
| Output source current | IO+ | 200 | 300 | mA | VO=0V, PW≤10us | 6 | |
| Output sink current | IO- | 400 | 600 | mA | VO=15V, PW≤10us | 6 | |
| VCC undervoltage hysteresis | VCCUVHYS | 0.7 | V | 6 | |||
| VBS undervoltage hysteresis | VBSUVHYS | 0.7 | V | 6 |
CAD (KiCad official)
- Symbol:
NSG2106 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
nsg2106-etched.step/nsg2106-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nsg2106.step/nsg2106.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WXNSIC datasheet (9 pp, sha256
8540460aca849328, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).