component
NSG2101
Public Made by Adomby adom
WXNSIC Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NSG2101
WXNSIC · Gate Drivers · SOIC-8
NSG2101 from WXNSIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply pin; recommended operating range is 10 V to 20 V, absolute maximum is 25 V, and the UVLO thresholds are 8.9 V rising and 8.2 V falling (typical). |
| 2 | HIN | input | High-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, referenced to VSS and compatible with 3.3 V, 5 V and 15 V logic; input voltage must stay within 0 to VCC. |
| 3 | LIN | input | Low-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, referenced to VSS and compatible with 3.3 V, 5 V and 15 V logic; input voltage must stay within 0 to VCC. |
| 4 | VSS | power_in | Ground reference pin; all voltage ratings in the datasheet are referenced to VSS. |
| 5 | LO | output | Low-side gate driver output that sources up to 300 mA and sinks up to 600 mA (pulse width 10 µs or less), swinging between 0 V and VCC. |
| 6 | VS | power_in | High-side floating ground reference; recommended range is -9 V to 700 V, dV/dt tolerance is ±50 V/ns, and it tolerates a 50 ns transient down to VSS-50 V (design-guaranteed). |
| 7 | HO | output | High-side gate driver output referenced to VS, with VHO between VS and VB. |
| 8 | VB | power_in | High-side floating supply; recommended range is VS + 10 V to VS + 20 V, with an absolute maximum of 725 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating supply voltage VB (absolute maximum) | VB | -0.3 | 725 | V | 5 | ||
| Low-side supply voltage VCC (absolute maximum) | VCC | -0.3 | 25 | V | 5 | ||
| Low-side output voltage VLO (absolute maximum) | VLO | -0.3 | V | 5 | |||
| Logic input voltage VIN (absolute maximum) | VIN | -0.3 | V | 5 | |||
| Allowable transient VS slew rate dVS/dt | dVS/dt | 50 | V/ns | 5 | |||
| ESD human body model | ESD | 1500 | V | 5 | |||
| ESD machine model | ESD | 500 | V | 5 | |||
| SOIC package power (TA ≤25°C) | PD1 | 625 | mW | TA ≤25°C | 5 | ||
| Thermal resistance junction-to-ambient | RthJA | 200 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -55 | 150 | °C | 5 | ||
| Lead temperature (soldering) | TL | 300 | °C/W | 5 | |||
| High-side floating ground offset VS (recommended) | VS | -9 | 700 | V | 5 | ||
| Low-side supply voltage VCC (recommended) | VCC | 10 | 20 | V | 5 | ||
| Low-side output voltage VLO (recommended) | VLO | 0 | V | 5 | |||
| Logic input voltage VIN (recommended) | VIN | 0 | V | 5 | |||
| Ambient temperature TA (recommended) | TA | -40 | 125 | °C | 5 | ||
| Turn-on propagation delay | tON | 130 | 200 | ns | VS=0V | 6 | |
| Turn-off propagation delay | tOFF | 130 | 200 | ns | VS=700V | 6 | |
| Turn-on rise time | tR | 75 | 130 | ns | 6 | ||
| Turn-off fall time | tF | 35 | 70 | ns | 6 | ||
| Delay matching time (tON, tOFF) | MT | 50 | ns | 6 | |||
| VCC undervoltage positive-going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | 6 | |
| VCC undervoltage negative-going threshold | VCCUV- | 7.4 | 8.2 | 9 | V | 6 | |
| High-side floating supply leakage current (700V) | ILK | 50 | μA | VB=VS=700V | 6 | ||
| VBS quiescent current | IQBS | 50 | 100 | μA | VIN=0V or 5V | 6 | |
| VCC quiescent current | IQCC | 120 | 240 | μA | VIN=0V or 5V | 6 | |
| Input logic high threshold voltage | VIH | 2.5 | V | VCC=10Vto 20V | 6 | ||
| Input logic low threshold voltage | VIL | 0.8 | V | VCC=10Vto 20V | 6 | ||
| Output high-level voltage drop (VBIAS - VO) | VOH | 0.1 | V | IO=0A | 6 | ||
| Output low-level voltage drop (VO) | VOL | 0.1 | V | IO=0A | 6 | ||
| Logic '1' input bias current | IIN+ | 5 | 10 | μA | HIN=5V, LIN=5V | 6 | |
| Logic '0' input bias current | IIN- | 2 | μA | HIN=0V, LIN=0V | 6 | ||
| Output source current IO+ | IO+ | 200 | 300 | mA | VO=0V, PW≤10us | 6 | |
| Output sink current IO- | IO- | 400 | 600 | mA | VO=15V, PW≤10us | 6 | |
| VCC quiescent current (typical only row) VCCUV hysteresis | VCCUVHYS | 0.7 | V | 6 |
CAD (KiCad official)
- Symbol:
NSG2101 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
nsg2101-etched.step/nsg2101-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nsg2101.step/nsg2101.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WXNSIC datasheet (9 pp, sha256
21c287353a980ab0, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NSG2101
**WXNSIC** · Gate Drivers · SOIC-8
NSG2101 from WXNSIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side supply pin; recommended operating range is 10 V to 20 V, absolute maximum is 25 V, and the UVLO thresholds are 8.9 V rising and 8.2 V falling (typical). |
| 2 | HIN | input | High-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, referenced to VSS and compatible with 3.3 V, 5 V and 15 V logic; input voltage must stay within 0 to VCC. |
| 3 | LIN | input | Low-side logic input with VIH minimum 2.5 V and VIL maximum 0.8 V, referenced to VSS and compatible with 3.3 V, 5 V and 15 V logic; input voltage must stay within 0 to VCC. |
| 4 | VSS | power_in | Ground reference pin; all voltage ratings in the datasheet are referenced to VSS. |
| 5 | LO | output | Low-side gate driver output that sources up to 300 mA and sinks up to 600 mA (pulse width 10 µs or less), swinging between 0 V and VCC. |
| 6 | VS | power_in | High-side floating ground reference; recommended range is -9 V to 700 V, dV/dt tolerance is ±50 V/ns, and it tolerates a 50 ns transient down to VSS-50 V (design-guaranteed). |
| 7 | HO | output | High-side gate driver output referenced to VS, with VHO between VS and VB. |
| 8 | VB | power_in | High-side floating supply; recommended range is VS + 10 V to VS + 20 V, with an absolute maximum of 725 V referenced to VSS. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High-side floating supply voltage VB (absolute maximum) | VB | -0.3 | | 725 | V | | 5 |
| Low-side supply voltage VCC (absolute maximum) | VCC | -0.3 | | 25 | V | | 5 |
| Low-side output voltage VLO (absolute maximum) | VLO | -0.3 | | | V | | 5 |
| Logic input voltage VIN (absolute maximum) | VIN | -0.3 | | | V | | 5 |
| Allowable transient VS slew rate dVS/dt | dVS/dt | | | 50 | V/ns | | 5 |
| ESD human body model | ESD | 1500 | | | V | | 5 |
| ESD machine model | ESD | 500 | | | V | | 5 |
| SOIC package power (TA ≤25°C) | PD1 | | | 625 | mW | TA ≤25°C | 5 |
| Thermal resistance junction-to-ambient | RthJA | | | 200 | °C/W | | 5 |
| Junction temperature | TJ | | | 150 | °C | | 5 |
| Storage temperature | TS | -55 | | 150 | °C | | 5 |
| Lead temperature (soldering) | TL | | | 300 | °C/W | | 5 |
| High-side floating ground offset VS (recommended) | VS | -9 | | 700 | V | | 5 |
| Low-side supply voltage VCC (recommended) | VCC | 10 | | 20 | V | | 5 |
| Low-side output voltage VLO (recommended) | VLO | 0 | | | V | | 5 |
| Logic input voltage VIN (recommended) | VIN | 0 | | | V | | 5 |
| Ambient temperature TA (recommended) | TA | -40 | | 125 | °C | | 5 |
| Turn-on propagation delay | tON | | 130 | 200 | ns | VS=0V | 6 |
| Turn-off propagation delay | tOFF | | 130 | 200 | ns | VS=700V | 6 |
| Turn-on rise time | tR | | 75 | 130 | ns | | 6 |
| Turn-off fall time | tF | | 35 | 70 | ns | | 6 |
| Delay matching time (tON, tOFF) | MT | | | 50 | ns | | 6 |
| VCC undervoltage positive-going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V | | 6 |
| VCC undervoltage negative-going threshold | VCCUV- | 7.4 | 8.2 | 9 | V | | 6 |
| High-side floating supply leakage current (700V) | ILK | | | 50 | μA | VB=VS=700V | 6 |
| VBS quiescent current | IQBS | | 50 | 100 | μA | VIN=0V or 5V | 6 |
| VCC quiescent current | IQCC | | 120 | 240 | μA | VIN=0V or 5V | 6 |
| Input logic high threshold voltage | VIH | 2.5 | | | V | VCC=10Vto 20V | 6 |
| Input logic low threshold voltage | VIL | | | 0.8 | V | VCC=10Vto 20V | 6 |
| Output high-level voltage drop (VBIAS - VO) | VOH | | | 0.1 | V | IO=0A | 6 |
| Output low-level voltage drop (VO) | VOL | | | 0.1 | V | IO=0A | 6 |
| Logic '1' input bias current | IIN+ | | 5 | 10 | μA | HIN=5V, LIN=5V | 6 |
| Logic '0' input bias current | IIN- | | | 2 | μA | HIN=0V, LIN=0V | 6 |
| Output source current IO+ | IO+ | 200 | 300 | | mA | VO=0V, PW≤10us | 6 |
| Output sink current IO- | IO- | 400 | 600 | | mA | VO=15V, PW≤10us | 6 |
| VCC quiescent current (typical only row) VCCUV hysteresis | VCCUVHYS | | 0.7 | | V | | 6 |
## CAD (KiCad official)
- Symbol: `NSG2101`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `nsg2101-etched.step` / `nsg2101-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nsg2101.step` / `nsg2101.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [WXNSIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603003523709743104) (9 pp, sha256 `21c287353a980ab0`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/nsg2101-datasheet.pdf)