component
NSG2066
Public Made by Adomby adom
WXNSIC Gate Drivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NSG2066
WXNSIC · Gate Drivers · TSSOP-20
NSG2066 from WXNSIC, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | Phase 1 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 2 | HIN2 | input | Phase 2 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 3 | HIN3 | input | Phase 3 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 4 | LIN1 | input | Phase 1 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 5 | LIN2 | input | Phase 2 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 6 | LIN3 | input | Phase 3 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 7 | VCC | power_in | Positive low-voltage supply for logic and low-side drivers, recommended 5 V to 20 V with absolute maximum 25 V referenced to COM. |
| 8 | COM | power_in | Ground reference for all voltage parameters and logic inputs. |
| 9 | LO3 | output | Phase 3 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 10 | LO2 | output | Phase 2 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 11 | LO1 | output | Phase 1 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 12 | VS3 | power_in | Phase 3 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 13 | HO3 | output | Phase 3 high-side gate drive output referenced to VS3, with 1.2 A typical source and 1.5 A typical sink current. |
| 14 | VB3 | power_in | Phase 3 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
| 15 | VS2 | power_in | Phase 2 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 16 | HO2 | output | Phase 2 high-side gate drive output referenced to VS2, with 1.2 A typical source and 1.5 A typical sink current. |
| 17 | VB2 | power_in | Phase 2 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
| 18 | VS1 | power_in | Phase 1 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 19 | HO1 | output | Phase 1 high-side gate drive output referenced to VS1, with 1.2 A typical source and 1.5 A typical sink current. |
| 20 | VB1 | power_in | Phase 1 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute max) | VCC | -0.3 | 25 | V | 5 | ||
| High-side floating supply voltage (absolute max) | VB1,2,3 | -0.3 | 275 | V | 5 | ||
| Low-side gate driver output voltage (absolute max) | VLO1,2,3 | -0.3 | V | 5 | |||
| Logic input voltage (absolute max) | VIN | -0.3 | V | 5 | |||
| ESD human body model | HBM | 1500 | V | 5 | |||
| Latch-up current | ILU | 100 | mA | 5 | |||
| Package power dissipation | PD | 1.25 | W | TA ≤25°C | 5 | ||
| Thermal resistance junction to ambient | RthJA | 100 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -55 | 150 | °C | 5 | ||
| Lead temperature | TL | 300 | °C | 5 | |||
| Supply voltage (recommended) | VCC | 5 | 20 | V | 5 | ||
| Low-side gate driver output voltage (recommended) | VLO1,2,3 | 0 | V | 5 | |||
| Phase node voltage (recommended) | VS1,2,3 | -5 | 250 | V | Note1: transient VS of COM-50V, 50ns pulse width (design-guaranteed) | 5 | |
| Logic input voltage (recommended) | VIN | 0 | V | 5 | |||
| Junction temperature (recommended) | Tj | -40 | 125 | °C | 5 | ||
| Turn-on propagation delay | ton | 50 | 150 | 300 | ns | 6 | |
| Turn-off propagation delay | toff | 50 | 150 | 300 | ns | 6 | |
| Output rise time | tr | 40 | 60 | ns | 6 | ||
| Output fall time | tf | 15 | 30 | ns | 6 | ||
| Delay matching on-time | MT | 20 | 50 | ns | 6 | ||
| Dead time | tDT | 100 | 200 | 300 | ns | 6 | |
| VCC undervoltage lockout rising threshold | VUVCC | 4.5 | 4.9 | V | 6 | ||
| VBS undervoltage lockout rising threshold | VUVBS | 4.5 | 4.9 | V | 6 | ||
| High-level input voltage threshold | VIH | 2.5 | V | 6 | |||
| Low-level input voltage threshold | VIL | 0.8 | V | 6 | |||
| Input current (HIN1,2,3, LIN1,2,3) | IIN+ | 25 | 50 | uA | HIN=5V,LIN=0V | 6 | |
| Input current (HIN1,2,3, LIN1,2,3) | IIN- | 2 | uA | HIN=0V,LIN=5V | 6 | ||
| Output high-level voltage | VOH | 0.2 | V | IO=20mA | 6 | ||
| Output low-level voltage | VOL | 0.1 | V | IO=-20mA | 6 | ||
| VCC quiescent supply current | IQCC | 700 | uA | VIN=0V or 5V | 6 | ||
| VBS quiescent supply current | IQBS | 60 | uA | HO1,2,3=Low | 6 | ||
| VB leakage current | ILK | 10 | uA | VB=VS=250V | 6 | ||
| Built-in diode equivalent resistance | RBSD | 300 | Ω | 6 |
CAD (KiCad official)
- Symbol:
NSG2066 - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
nsg2066-etched.step/nsg2066-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nsg2066.step/nsg2066.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: WXNSIC datasheet (9 pp, sha256
5061b7a711131fd6, retrieved 2026-10-18, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NSG2066
**WXNSIC** · Gate Drivers · TSSOP-20
NSG2066 from WXNSIC, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN1 | input | Phase 1 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 2 | HIN2 | input | Phase 2 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 3 | HIN3 | input | Phase 3 high-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 4 | LIN1 | input | Phase 1 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 5 | LIN2 | input | Phase 2 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 6 | LIN3 | input | Phase 3 low-side logic input, compatible with 3.3 V/5 V logic, with VIH min 2.5 V, VIL max 0.8 V and input range 0 to VCC. |
| 7 | VCC | power_in | Positive low-voltage supply for logic and low-side drivers, recommended 5 V to 20 V with absolute maximum 25 V referenced to COM. |
| 8 | COM | power_in | Ground reference for all voltage parameters and logic inputs. |
| 9 | LO3 | output | Phase 3 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 10 | LO2 | output | Phase 2 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 11 | LO1 | output | Phase 1 low-side gate drive output referenced to COM, swinging 0 to VCC, with 1.2 A typical source and 1.5 A typical sink current. |
| 12 | VS3 | power_in | Phase 3 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 13 | HO3 | output | Phase 3 high-side gate drive output referenced to VS3, with 1.2 A typical source and 1.5 A typical sink current. |
| 14 | VB3 | power_in | Phase 3 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
| 15 | VS2 | power_in | Phase 2 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 16 | HO2 | output | Phase 2 high-side gate drive output referenced to VS2, with 1.2 A typical source and 1.5 A typical sink current. |
| 17 | VB2 | power_in | Phase 2 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
| 18 | VS1 | power_in | Phase 1 high-side floating ground (switch node), recommended −5 V to 250 V relative to COM, with −50 V transient for 50 ns guaranteed by design. |
| 19 | HO1 | output | Phase 1 high-side gate drive output referenced to VS1, with 1.2 A typical source and 1.5 A typical sink current. |
| 20 | VB1 | power_in | Phase 1 high-side floating bootstrap supply, recommended VS+5 V to VS+20 V, with absolute maximum 275 V referenced to COM. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | WXNSIC |
| Package | TSSOP-20 |
| Category | Motor Driver ICs |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute max) | VCC | -0.3 | | 25 | V | | 5 |
| High-side floating supply voltage (absolute max) | VB1,2,3 | -0.3 | | 275 | V | | 5 |
| Low-side gate driver output voltage (absolute max) | VLO1,2,3 | -0.3 | | | V | | 5 |
| Logic input voltage (absolute max) | VIN | -0.3 | | | V | | 5 |
| ESD human body model | HBM | 1500 | | | V | | 5 |
| Latch-up current | ILU | 100 | | | mA | | 5 |
| Package power dissipation | PD | | | 1.25 | W | TA ≤25°C | 5 |
| Thermal resistance junction to ambient | RthJA | | | 100 | °C/W | | 5 |
| Junction temperature | TJ | | | 150 | °C | | 5 |
| Storage temperature | TS | -55 | | 150 | °C | | 5 |
| Lead temperature | TL | | | 300 | °C | | 5 |
| Supply voltage (recommended) | VCC | 5 | | 20 | V | | 5 |
| Low-side gate driver output voltage (recommended) | VLO1,2,3 | 0 | | | V | | 5 |
| Phase node voltage (recommended) | VS1,2,3 | -5 | | 250 | V | Note1: transient VS of COM-50V, 50ns pulse width (design-guaranteed) | 5 |
| Logic input voltage (recommended) | VIN | 0 | | | V | | 5 |
| Junction temperature (recommended) | Tj | -40 | | 125 | °C | | 5 |
| Turn-on propagation delay | ton | 50 | 150 | 300 | ns | | 6 |
| Turn-off propagation delay | toff | 50 | 150 | 300 | ns | | 6 |
| Output rise time | tr | | 40 | 60 | ns | | 6 |
| Output fall time | tf | | 15 | 30 | ns | | 6 |
| Delay matching on-time | MT | | 20 | 50 | ns | | 6 |
| Dead time | tDT | 100 | 200 | 300 | ns | | 6 |
| VCC undervoltage lockout rising threshold | VUVCC | | 4.5 | 4.9 | V | | 6 |
| VBS undervoltage lockout rising threshold | VUVBS | | 4.5 | 4.9 | V | | 6 |
| High-level input voltage threshold | VIH | 2.5 | | | V | | 6 |
| Low-level input voltage threshold | VIL | | | 0.8 | V | | 6 |
| Input current (HIN1,2,3, LIN1,2,3) | IIN+ | | 25 | 50 | uA | HIN=5V,LIN=0V | 6 |
| Input current (HIN1,2,3, LIN1,2,3) | IIN- | | | 2 | uA | HIN=0V,LIN=5V | 6 |
| Output high-level voltage | VOH | | | 0.2 | V | IO=20mA | 6 |
| Output low-level voltage | VOL | | | 0.1 | V | IO=-20mA | 6 |
| VCC quiescent supply current | IQCC | | | 700 | uA | VIN=0V or 5V | 6 |
| VBS quiescent supply current | IQBS | | | 60 | uA | HO1,2,3=Low | 6 |
| VB leakage current | ILK | | | 10 | uA | VB=VS=250V | 6 |
| Built-in diode equivalent resistance | RBSD | | | 300 | Ω | | 6 |
## CAD (KiCad official)
- Symbol: `NSG2066`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `nsg2066-etched.step` / `nsg2066-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nsg2066.step` / `nsg2066.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [WXNSIC datasheet](docs/nsg2066-datasheet.pdf) (9 pp, sha256 `5061b7a711131fd6`, retrieved 2026-10-18, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/nsg2066-datasheet.pdf)