component
ns4263
Public Made by Adomby adom
Shenzhen Nsiway Tech Audio Power OpAmps, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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ns4263: restore the component block (pinout + model declarations) from this page's own README and symbol
1 file changed
+122−1
page.json+122−1@@ -33,5 +33,126 @@ "author": { "name": "Ray", "email": "[email protected]"+ },+ "component": {+ "mpn": "NS4263",+ "manufacturer": "Shenzhen Nsiway Tech",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Audio Power OpAmps",+ "parts": {+ "symbol": "ns4263.kicad_sym",+ "footprint": "ns4263.kicad_mod",+ "model_3d": "ns4263-etched.glb",+ "model_3d_plain": "ns4263.glb",+ "model_3d_step": "ns4263-etched.step",+ "model_3d_step_plain": "ns4263.step",+ "lbr": "ns4263.lbr"+ },+ "pins": [+ {+ "number": "1",+ "name": "SD",+ "type": "input",+ "description": "Shutdown and Class-AB/Class-D mode-select control via one-wire pulse (VIH=1.4V min, VIL=0.4V max). A logic high held >100 us places the chip in low-power shutdown; a single falling edge sets Class-AB, two consecutive falling edges set Class-D. THI/TLO pulse widths must be 1-12 us."+ },+ {+ "number": "2",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground / power return. Connect together with pins 7 and 15 to the board ground plane."+ },+ {+ "number": "3",+ "name": "VoPA",+ "type": "output",+ "description": "Left-channel BTL positive output. Drives one side of the left speaker (4-8 Ω typical) in bridge-tied load mode; in single-ended headphone mode this side is coupled through the 100 uF output cap."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "Main analog/PWM supply input, 3.0-5.5 V operating (6 V abs max). Bypass with 10 uF electrolytic in parallel with 0.1 uF ceramic close to the pin; tie together with pin 13."+ },+ {+ "number": "5",+ "name": "VoNA",+ "type": "output",+ "description": "Left-channel BTL negative output. Drives the return side of the left speaker in bridge mode; used as the left-channel single-ended output to the headphone jack via the 100 uF DC-blocking capacitor."+ },+ {+ "number": "6",+ "name": "INNA",+ "type": "input",+ "description": "Left-channel inverting audio input. AC-coupled through Ci (0.1-0.39 uF) and series input resistor Ri (typ. 20 kΩ); gain per channel Av = 240k / Rin. Non-inverting input is tied internally to VREF."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground / power return. Tie together with pins 2 and 15 to the ground plane."+ },+ {+ "number": "8",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave floating or tie to ground per PCB convenience."+ },+ {+ "number": "9",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection. Leave floating or tie to ground per PCB convenience."+ },+ {+ "number": "10",+ "name": "VREF",+ "type": "passive",+ "description": "Internal mid-supply bias reference (approx. VDD/2). Requires a 1 uF bypass capacitor Cb to GND; the cap value sets startup ramp / pop-noise behavior."+ },+ {+ "number": "11",+ "name": "INNB",+ "type": "input",+ "description": "Right-channel inverting audio input. AC-coupled through Ci (0.1-0.39 uF) and series input resistor Ri (typ. 20 kΩ); gain per channel Av = 240k / Rin. Non-inverting input is tied internally to VREF."+ },+ {+ "number": "12",+ "name": "VoNB",+ "type": "output",+ "description": "Right-channel BTL negative output. Drives the return side of the right speaker in bridge mode; used as the right-channel single-ended output to the headphone jack via the 100 uF DC-blocking capacitor."+ },+ {+ "number": "13",+ "name": "VDD",+ "type": "power_in",+ "description": "Main analog/PWM supply input, 3.0-5.5 V operating (6 V abs max). Tie together with pin 4 and bypass with 10 uF electrolytic in parallel with 0.1 uF ceramic close to the pin."+ },+ {+ "number": "14",+ "name": "VoPB",+ "type": "output",+ "description": "Right-channel BTL positive output. Drives one side of the right speaker (4-8 Ω typical) in bridge-tied load mode."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground / power return. Tie together with pins 2 and 7 to the ground plane."+ },+ {+ "number": "16",+ "name": "HP-IN",+ "type": "input",+ "description": "Headphone-mode select input (VIH=1.4V min, VIL=0.4V max). Logic low = BTL speaker mode; logic high = single-ended stereo headphone mode. Typically driven from a resistor divider off the headphone jack's mechanical switch (HP CONTROL) so plug insertion auto-switches the output topology."+ }+ ],+ "provenance": {+ "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ } }-}+}