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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray 1mo ago
ns4160-etched.fit.json ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ns4160-etched.glb ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ns4160-etched.step ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
ns4160.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body regenerated from the footprint F.Fab outline) · Ray 1mo ago
ns4160.kicad_mod Publish 0.1.0 · Ray 1mo ago
ns4160.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no net (vendor string 'ESOP-8' denotes an exposed pad) · Ray 1mo ago
ns4160.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect and oval pad as a SQUARE EAGLE smd; this carries the real pad shape across (0 -> 8 rounded pads) and stops dropping geometry drawn on KiCad User.N layers. Attributes, connects, pads and the pin-1 marker are gated against decreasing and are unchanged. · Ray 1mo ago
ns4160.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body regenerated from the footprint F.Fab outline) · Ray 1mo ago
package.json Publish 0.2.0 · Ray 1mo ago
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no net (vendor string 'ESOP-8' denotes an exposed pad) · Ray 1mo ago
page.json ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
README.md ns4160: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago

NS4160

Shenzhen Nsiway Tech · Audio Power OpAmps · ESOP-8

NS4160 from Shenzhen Nsiway Tech, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CTRL input Shutdown and Class-AB/Class-D mode selection control input via a one-wire pulse protocol. Logic low shuts down the amplifier (Vctrl=VDD puts the chip in shutdown with ~1 µA typical leakage). VIH ≥ 1.4V, VIL ≤ 0.4V; one-wire pulse high/low time 1-12 µs, shutdown assertion time ≥ 100 µs.
2 Bypass passive Internal reference-voltage bypass node. Connect an external decoupling capacitor (typ. 0.1 µF) from this pin to GND to filter the mid-supply reference and improve PSRR/noise performance.
3 INP input Positive (non-inverting) differential audio input to the input buffer. AC-coupled through a 0.1 µF capacitor with a 10 kΩ series/gain-setting resistor in the typical application.
4 INN input Negative (inverting) differential audio input to the input buffer. AC-coupled through a 0.1 µF capacitor with a 10 kΩ series/gain-setting resistor in the typical application.
5 VoN output Negative bridge-tied-load (BTL) speaker output from the output stage. Drives one terminal of the loudspeaker directly (filterless in Class-D mode); supports 2Ω/4Ω/8Ω loads.
6 VDD power_in Positive power supply input, 3.0 V to 5.5 V (absolute max 5.5 V). Decouple to GND with a 1 µF capacitor close to the pin. Typical quiescent current IDD ≈ 12 mA at 3.6 V and 18 mA at 5.0 V.
7 GND power_in Device ground return. Provides the reference for the supply, bypass capacitor, and speaker return currents; also acts as the thermal reference for the eSOP-8 package.
8 VoP output Positive bridge-tied-load (BTL) speaker output from the output stage. Drives the other terminal of the loudspeaker directly (filterless in Class-D mode); supports 2Ω/4Ω/8Ω loads.

Key specifications

Parameter Value
Manufacturer Shenzhen Nsiway Tech
Package ESOP-8
Category Op-amp/Cmp
Pins 8

CAD (KiCad official)

  • Symbol: NS4160
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: ns4160-etched.step / ns4160-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ns4160.step / ns4160.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ns4160.step 193 KB You want the bare part, or you mark your own boards.
ns4160-etched.step 1.2 MB You want the part with NS4160 already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 311 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen Nsiway Tech datasheet (11 pp, sha256 d7dfcb07ef6f9aa8, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF