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NPIC6C596BQ

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Nexperia Shift Registers, DHVQFN-16-EP(2.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NPIC6C596BQ

Nexperia · Shift Registers · DHVQFN-16-EP(2.5x3.5)

NPIC6C596BQ from Nexperia, in a DHVQFN-16-EP(2.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage, with 4.5 V to 5.5 V as the recommended operating range.
2 DS input Serial data input, shifted into the shift register on the LOW-to-HIGH transition of SHCP with set-up and hold time of at least 15 ns.
3 Q0 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
4 Q1 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
5 Q2 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
6 Q3 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
7 MR input Asynchronous master reset, active LOW, which resets both the shift register and the storage register.
8 OE input Output enable, active LOW; a HIGH forces the Qn outputs into the high-impedance OFF-state without changing register contents.
9 Q7S output Serial data output clocked out on the falling edge of SHCP, providing hold time in cascaded applications.
10 STCP input Storage register clock; data transfers from the shift register to the storage register on a LOW-to-HIGH transition.
11 Q4 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
12 Q5 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
13 Q6 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
14 Q7 output Parallel open-drain output (extended-drain NMOS) rated 33 V with 100 mA continuous current.
15 SHCP input Shift register clock; data is shifted on the LOW-to-HIGH transition, with a maximum serial clock frequency of 10 MHz in cascaded operation.
16 GND power_in Ground reference, 0 V.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-16-EP(2.5x3.5)
Category Logic
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 6
input voltage VI -0.3 7 V 6
drain-source voltage VDS 33 V power EDNMOS drain-source voltage 6
source-drain diode current continuous Id(SD) 250 mA continuous 6
source-drain diode current pulsed Id(SD) 500 mA pulsed 6
drain current continuous ID 100 mA Tamb = 25 C; continuous; each output; all outputs on 6
drain current pulsed ID 250 mA pulsed; each output; all outputs on 6
peak drain current IDM 250 mA single output; Tamb = 25 C 6
avalanche energy EAS 30 mJ single pulse; see Figure 9 6
avalanche current IAL 200 mA see Figure 9 6
storage temperature Tstg -65 150 C 6
total power dissipation DHVQFN16 Ptot 1825 mW Tamb = 25 C 6
total power dissipation DHVQFN16 Ptot 365 mW Tamb = 125 C 6
supply voltage VCC 4.5 5.5 V 7
input voltage VI 0 5.5 V 7
drain current pulsed ID 250 mA pulsed drain output current; VCC = 5 V; Tamb = 25 C; all outputs on 7
ambient temperature Tamb -40 125 C 7
HIGH-level output voltage Q7S VOH 4.4 4.49 V serial data output Q7S; VI = VIH or VIL; IO = 20 uA; VCC = 4.5 V 7
HIGH-level output voltage Q7S VOH 4 4.2 V serial data output Q7S; VI = VIH or VIL; IO = 4 mA; VCC = 4.5 V 7
LOW-level output voltage Q7S VOL 0.005 0.1 V serial data output Q7S; VI = VIH or VIL; IO = 20 uA; VCC = 4.5 V 8
LOW-level output voltage Q7S VOL 0.3 0.5 V serial data output Q7S; VI = VIH or VIL; IO = 4 mA; VCC = 4.5 V 8
HIGH-level input current IIH -1 uA VCC = 5.5 V; VI = VCC 8
LOW-level input current IIL 1 uA VCC = 5.5 V; VI = 0 V 8
drain-source breakdown voltage V(BR)DSS 33 37 V ID = 1 mA 8
source-drain voltage VSD 0.85 1.2 V diode forward voltage; IF = 100 mA 8
supply current all outputs off ICC 0.004 200 uA logic supply current; VCC = 5.5 V; VI = VCC or GND; all outputs off 8
supply current all outputs on ICC 0.006 500 uA logic supply current; VCC = 5.5 V; VI = VCC or GND; all outputs on 8
supply current all outputs off at 5 MHz ICC 0.75 5 mA all outputs off; SHCP = 5 MHz; CL = 30 pF; see Figure 14 and Figure 16 8
drain cut-off current IDSX 0.002 0.2 uA VCC = 5.5 V; VDS = 30 V 8
drain cut-off current IDSX 0.15 0.3 uA VCC = 5.5 V; VDS = 30 V; Tamb = 125 C 8
drain-source on-state resistance RDSon 3 9 ohm see Figure 17 and Figure 18; VCC = 4.5 V; ID = 50 mA 8
drain-source on-state resistance RDSon 5.4 12 ohm see Figure 17 and Figure 18; VCC = 4.5 V; ID = 50 mA; Tamb = 125 C 8
drain-source on-state resistance RDSon 3.1 10 ohm see Figure 17 and Figure 18; VCC = 4.5 V; ID = 100 mA 8
maximum frequency fmax 10 MHz SHCP; ID = 75 mA; see Figure 11 9
set-up time DS to SHCP tsu 15 ns DS to SHCP; see Figure 12 9
hold time DS to SHCP th 15 ns DS to SHCP; see Figure 12 9
pulse width tW 40 ns 9

CAD (KiCad official)

  • Symbol: NPIC6C596BQ
  • Footprint: Package_DFN_QFN:DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm
  • 3D model: DHVQFN-16-EP(2.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: npic6c596bq-etched.step / npic6c596bq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); npic6c596bq.step / npic6c596bq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (21 pp, sha256 b8de1ca1c1338e17, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF