component
NP4805SR-G
Public Made by Adomby adom
NATLINEAR MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownNP4805SR-G
NATLINEAR · MOSFETs · SOP-8
NP4805SR-G from NATLINEAR, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S2 | passive | Source of P-channel MOSFET 2. |
| 2 | G2 | input | Gate of P-channel MOSFET 2, rated VGS ±20V max. |
| 3 | S1 | passive | Source of P-channel MOSFET 1. |
| 4 | G1 | input | Gate of P-channel MOSFET 1, rated VGS ±20V max. |
| 5 | D1 | passive | Drain of P-channel MOSFET 1, VDS -30V max, ID -8A continuous; tied to pin 6. |
| 6 | D1 | passive | Drain of P-channel MOSFET 1, VDS -30V max, ID -8A continuous; tied to pin 5. |
| 7 | D2 | passive | Drain of P-channel MOSFET 2, VDS -30V max, ID -8A continuous; tied to pin 8. |
| 8 | D2 | passive | Drain of P-channel MOSFET 2, VDS -30V max, ID -8A continuous; tied to pin 7. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NATLINEAR |
| Package | SOP-8 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | BVDSS | -30 | V | VGS=0V, ID=-250µA | 2 | ||
| Zero gate voltage drain current | IDSS | 1 | µA | VDS=-30V, VGS=0V | 2 | ||
| Zero gate voltage drain current | IDSS | 30 | µA | VDS=-30V, VGS=0V, TJ=85°C | 2 | ||
| Gate leakage current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 2 | |
| Gate threshold voltage | VGS(th) | -1.2 | -1.6 | -2.5 | V | VDS=VGS, ID=-250µA | 2 |
| Drain-source on-state resistance | RDS(ON) | 16.5 | 20 | mΩ | VGS=-10V, ID=-8A | 2 | |
| Drain-source on-state resistance | RDS(ON) | 17.5 | 25 | mΩ | VGS=-4.5V, ID=-7A | 2 | |
| On status drain current | ID(ON) | 8 | A | VDS=-15V, VGS=-10V | 2 | ||
| Diode forward voltage | VSD | -0.8 | -1.3 | V | ISD=-8A, VGS=0V | 2 | |
| Maximum junction-to-ambient (≤10s) | RθJA | 33 | 40 | ℃/W | t ≤ 10s | 2 | |
| Maximum junction-to-ambient (steady-state) | RθJA | 59 | 75 | ℃/W | Steady-State | 2 | |
| Maximum junction-to-lead (steady-state) | RθJC | 16 | 24 | ℃/W | Steady-State | 2 | |
| Drain-source voltage | VDS | -30 | V | TA=25℃ | 1 | ||
| Gate-source voltage | VGS | -20 | 20 | V | TA=25℃ | 1 | |
| Continuous drain current | ID | -8 | A | TA=25°C, silicon limited | 1 | ||
| Continuous drain current | ID | -6 | A | TA=75°C, silicon limited | 1 | ||
| Pulsed drain current | IDM | -32 | A | Package limited | 1 | ||
| Maximum power dissipation | PD | 2 | W | TA=25°C | 1 | ||
| Maximum power dissipation | PD | 1.3 | W | TA=75°C | 1 | ||
| Operating junction temperature range | Tj | -55 | 150 | ℃ | 1 | ||
| Storage temperature | -55 | 150 | °C | Ordering information | 1 | ||
| Diode continuous forward current | IS | -8 | A | 2 | |||
| Reverse recovery time | trr | 24 | ns | IF=-8A, dI/dt=-100A/us | 2 | ||
| Reverse recovery charge | Qrr | 16 | nC | IF=-8A, dI/dt=-100A/us | 2 | ||
| Gate resistance | RG | 0.65 | Ω | VGS=0V, VDS=0V, f=1MHz | 2 | ||
| Input capacitance | CISS | 1360 | pF | VGS=0V, VDS=-15V, f=1.0MHz | 2 | ||
| Output capacitance | COSS | 250 | pF | VGS=0V, VDS=-15V, f=1.0MHz | 2 | ||
| Reverse transfer capacitance | CRSS | 210 | pF | VGS=0V, VDS=-15V, f=1.0MHz | 2 | ||
| Turn-on delay time | tD(ON) | 9 | ns | VGS=-10V, VDD=-30V, RL=3Ω, ID=1A, RG=2.5Ω | 2 | ||
| Turn-on rise time | tr | 10 | ns | VGS=-10V, VDD=-30V, RL=3Ω, ID=1A, RG=2.5Ω | 2 | ||
| Turn-off delay time | tD(OFF) | 50 | ns | VGS=-10V, VDD=-30V, RL=3Ω, ID=1A, RG=2.5Ω | 2 | ||
| Turn-off fall time | tf | 20 | ns | VGS=-10V, VDD=-30V, RL=3Ω, ID=1A, RG=2.5Ω | 2 | ||
| Total gate charge | Qg | 31 | nC | VGS=-10V, ID=-8A, VDS=-15V | 2 | ||
| Gate-source charge | Qgs | 3 | nC | VGS=-10V, ID=-8A, VDS=-15V | 2 | ||
| Gate-drain charge | Qgd | 9 | nC | VGS=-10V, ID=-8A, VDS=-15V | 2 |
CAD (KiCad official)
- Symbol:
NP4805SR-G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
np4805sr-g-etched.step/np4805sr-g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);np4805sr-g.step/np4805sr-g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NATLINEAR datasheet (6 pp, sha256
bd8eecf77ce6da3e, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).