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NLV17SZ06DFT2G

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onsemi Inverters, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NLV17SZ06DFT2G

onsemi · Inverters · SOT-353

NLV17SZ06DFT2G from onsemi, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection; pin 1 is not internally connected.
2 IN A input Logic input A, over-voltage tolerant so VIN may be 0 to 7.0 V for VCC between 0.5 and 5.5 V.
3 GND power_in Ground reference (0 V) for the device.
4 OUT Y tri_state Open-drain inverting output Y that sinks up to 24 mA, with an external pullup allowed between 0 and 7.0 V; output is low when A is high and high impedance when A is low.
5 VCC power_in Positive supply, designed for 1.65 V to 5.5 V operation (absolute maximum −0.5 to +7.0 V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-353
Category Logic
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage Operating VCC 1.65 5.5 V 2
Supply Voltage Data Retention Only VCC 1.5 5.5 V Data Retention Only 2
Input Voltage VI 0 5.5 V 2
Output Voltage (Z or LOW State) VO 0 5.5 V Z or LOW State 2
Operating Free-Air Temperature TA -55 125 °C 2
Input Transition Rise or Fall Rate t/V 0 20 ns/V VCC = 2.5 V ±0.2 V 2
Input Transition Rise or Fall Rate t/V 0 10 ns/V VCC = 3.0 V ±0.3 V 2
Input Transition Rise or Fall Rate t/V 0 5 ns/V VCC = 5.0 V ±0.5 V 2
DC Supply Voltage VCC -0.5 7 V 2
DC Input Voltage VI -0.5 7 V 2
DC Output Voltage VO -0.5 7 V Output in Z or LOW State (Note 1) 2
DC Input Diode Current IIK -50 mA VI < GND 2
DC Output Diode Current IOK -50 mA VO < GND 2
DC Output Sink Current IO -50 50 mA 2
DC Supply Current Per Supply Pin ICC -100 100 mA 2
DC Ground Current Per Ground Pin IGND -100 100 mA 2
Storage Temperature Range TSTG -65 150 °C 2
Power Dissipation in Still Air PD 186 mW Still air 2
Thermal Resistance θJA 350 °C/W 2
Lead Temperature TL 260 °C 1 mm from case for 10 seconds 2
Junction Temperature Under Bias TJ 150 °C 2
Latch-Up Performance ILatch-Up -500 500 mA Above VCC and below GND at 85°C 2
High-Level Input Voltage VIH 0.75 VCC VCC = 1.65 to 1.95 V 3
High-Level Input Voltage VIH 0.7 VCC VCC = 2.3 to 5.5 V 3
Low-Level Input Voltage VIL 0.25 VCC VCC = 1.65 to 1.95 V 3
Low-Level Input Voltage VIL 0.3 VCC VCC = 2.3 to 5.5 V 3
Z-State Output Leakage Current ILKG 5 10 µA VIN = VIL; VOUT = VCC or GND; VCC = 2.3 to 5.5 V 3
Low-Level Output Voltage VOL 0 0.1 V VIN = VIH or VIL; IOL = 100 µA; VCC = 1.65 to 5.5 V 3
Low-Level Output Voltage VOL 0.08 0.24 V VIN = VIH or VIL; IOL = 4 mA; VCC = 1.65 V 3
Low-Level Output Voltage VOL 0.22 0.3 V VIN = VIH or VIL; IOL = 8 mA; VCC = 2.3 V 3
Low-Level Output Voltage VOL 0.22 0.4 V VIN = VIH or VIL; IOL = 12 mA; VCC = 2.7 V 3
Low-Level Output Voltage VOL 0.28 0.4 V VIN = VIH or VIL; IOL = 16 mA; VCC = 3.0 V 3
Low-Level Output Voltage VOL 0.38 0.55 V VIN = VIH or VIL; IOL = 24 mA; VCC = 3.0 V 3
Low-Level Output Voltage VOL 0.42 0.55 V VIN = VIH or VIL; IOL = 32 mA; VCC = 4.5 V 3
Input Leakage Current IIN 0.1 1 µA VIN = 5.5 V or GND; VCC = 0 to 5.5 V 3
Power Off Leakage Current IOFF 1 10 µA VIN = 5.5 V or VOUT = 5.5 V; VCC = 0 V 3
Quiescent Supply Current ICC 1 10 µA VIN = 5.5 V or GND; VCC = 5.5 V 3
Propagation Delay tPZL tPZL 0.8 5.3 12 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 1.65 V 3
Propagation Delay tPZL tPZL 0.8 3 4.1 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 2.5 ± 0.2 V 3
Propagation Delay tPZL tPZL 0.8 2.4 3.7 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 3.3 ± 0.3 V 3
Propagation Delay tPZL tPZL 0.5 2.4 3.5 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 5.0 ± 0.5 V 3
Propagation Delay tPLZ tPLZ 0.8 5.3 12 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 1.65 V 3
Propagation Delay tPLZ tPLZ 0.8 2.5 4.1 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 2.5 ± 0.2 V 3
Propagation Delay tPLZ tPLZ 0.8 2.1 3.7 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 3.3 ± 0.3 V 3
Propagation Delay tPLZ tPLZ 0.5 1.2 3.5 ns RL = R1 = 500 Ω; CL = 50 pF; VCC = 5.0 ± 0.5 V 3

CAD (KiCad official)

  • Symbol: NLV17SZ06DFT2G
  • Footprint: Package_TO_SOT_SMD:SOT-353_SC-70-5
  • 3D model: SOT-353 (KiCad packages3D, STEP)
  • 3D model files: nlv17sz06dft2g-etched.step / nlv17sz06dft2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nlv17sz06dft2g.step / nlv17sz06dft2g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 02c05454ccbf82c3, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF