component
NLV17SZ02DFT2G
Public Made by Adomby adom
onsemi Logic Gates, SOT-353. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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NLV17SZ02DFT2G
onsemi · Logic Gates · SOT-353
NLV17SZ02DFT2G from onsemi, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Logic input A of the 2-input NOR gate, overvoltage tolerant up to 5.5 V and supporting partial power-down protection (IOFF). |
| 2 | B | input | Logic input B of the 2-input NOR gate, overvoltage tolerant up to 5.5 V and supporting partial power-down protection (IOFF). |
| 3 | GND | power_in | Ground reference pin for the device. |
| 4 | Y | output | Gate output; the datasheet rates it for 24 mA source/sink at 3.0 V and an absolute maximum output current of ±50 mA. |
| 5 | VCC | power_in | Positive supply pin, operating from 1.65 V to 5.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOT-353 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive DC Supply Voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| DC Input Voltage | VIN | 0 | 5.5 | V | 4 | ||
| DC Output Voltage | VOUT | 0 | V | Active-Mode (High or Low State); max printed as VCC | 4 | ||
| DC Output Voltage | VOUT | 0 | 5.5 | V | Tri-State Mode (Note 1) | 4 | |
| Operating Temperature Range | TA | -55 | 125 | °C | 4 | ||
| Input Rise and Fall Time | tr, tf | 0 | 100 | ns/V | SC-88A (NLV); VCC = 3.0 V to 3.6 V | 4 | |
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | SC-88A (NLV); VCC = 4.5 V to 5.5 V | 4 | |
| DC Supply Voltage | VCC | -0.5 | 7 | V | SC-88A (NLV) | 3 | |
| DC Input Voltage | VIN | -0.5 | 7 | V | SC-88A (NLV) | 3 | |
| DC Output Voltage | VOUT | -0.5 | V | SC-88A (NLV) Active-Mode (High or Low State); max printed as VCC + 0.5 | 3 | ||
| DC Output Voltage | VOUT | -0.5 | 7 | V | SC-88A (NLV) Tri-State Mode (Note 1) | 3 | |
| DC Input Diode Current | IIK | -50 | mA | VIN < GND | 3 | ||
| DC Output Diode Current | IOK | -50 | mA | VOUT < GND | 3 | ||
| DC Output Source/Sink Current | IOUT | -50 | 50 | mA | 3 | ||
| DC Supply Current per Supply Pin or Ground Pin | ICC or IGND | -100 | 100 | mA | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 secs | 3 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | 3 | |||
| Thermal Resistance (junction to ambient) | JA | 377 | °C/W | SC-88A; Note 2 (minimum pad spacing, FR4, JESD51-7, no air flow) | 3 | ||
| Power Dissipation in Still Air | PD | 332 | mW | SC-88A | 3 | ||
| ESD Withstand Voltage Human Body Model | VESD | 2000 | V | Human Body Model | 3 | ||
| ESD Withstand Voltage Charged Device Model | VESD | 1000 | V | Charged Device Model | 3 | ||
| Latchup Performance | ILatchup | 100 | mA | Tested to EIA/JESD78 Class II | 3 | ||
| High-Level Output Voltage | VOH | 1.29 | 1.4 | V | VIN = VIH or VIL; IOH = -4 mA; VCC = 1.65 V | 4 | |
| High-Level Output Voltage | VOH | 1.9 | 2.1 | V | VIN = VIH or VIL; IOH = -8 mA; VCC = 2.3 V | 4 | |
| High-Level Output Voltage | VOH | 2.2 | 2.4 | V | VIN = VIH or VIL; IOH = -12 mA; VCC = 2.7 V | 4 | |
| High-Level Output Voltage | VOH | 2.4 | 2.7 | V | VIN = VIH or VIL; IOH = -16 mA; VCC = 3.0 V | 4 | |
| High-Level Output Voltage | VOH | 2.3 | 2.5 | V | VIN = VIH or VIL; IOH = -24 mA; VCC = 3.0 V | 4 | |
| High-Level Output Voltage | VOH | 3.8 | 4 | V | VIN = VIH or VIL; IOH = -32 mA; VCC = 4.5 V | 4 | |
| Low-Level Output Voltage | VOL | 0.1 | V | VIN = VIH or VIL; IOL = 100 uA; VCC = 1.65 to 5.5 V; -55C ≤ TA ≤ 125C | 4 | ||
| Low-Level Output Voltage | VOL | 0.24 | V | VIN = VIH or VIL; IOL = 4 mA; VCC = 1.65 V; -55C ≤ TA ≤ 125C | 4 | ||
| Low-Level Output Voltage | VOL | 0.3 | V | VIN = VIH or VIL; IOL = 8 mA; VCC = 2.3 V; -55C ≤ TA ≤ 125C | 4 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | VIN = VIH or VIL; IOL = 12 mA; VCC = 2.7 V; -55C ≤ TA ≤ 125C | 4 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | VIN = VIH or VIL; IOL = 24 mA; VCC = 3.0 V; -55C ≤ TA ≤ 125C | 4 | ||
| Input Leakage Current | IIN | -0.1 | 0.1 | uA | VIN = 5.5 V or GND; VCC = 1.65 to 5.5 V; TA = 25C | 4 | |
| Input Leakage Current | IIN | -1 | 1 | uA | VIN = 5.5 V or GND; VCC = 1.65 to 5.5 V; -55C ≤ TA ≤ 125C | 4 | |
| Power Off Leakage Current | IOFF | 1 | uA | VCC = 0 V; VIN = 5.5 V or VOUT = 5.5 V; TA = 25C | 4 | ||
| Power Off Leakage Current | IOFF | 10 | uA | VCC = 0 V; VIN = 5.5 V or VOUT = 5.5 V; -55C ≤ TA ≤ 125C | 4 | ||
| Quiescent Supply Current | ICC | 1 | uA | VIN = VCC or GND; VCC = 5.5 V; TA = 25C | 4 | ||
| Quiescent Supply Current | ICC | 10 | uA | VIN = VCC or GND; VCC = 5.5 V; -55C ≤ TA ≤ 125C | 4 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 5.3 | 11 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 1.65 to 1.95 V; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 12 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 1.65 to 1.95 V; -55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 2.9 | 6.5 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 2.3 to 2.7 V; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 7 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 2.3 to 2.7 V; -55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 2.3 | 4.5 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 3.0 to 3.6 V; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 4.7 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 3.0 to 3.6 V; -55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 2.9 | 5 | ns | RL = 500 Ω, CL = 50 pF; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 5.2 | ns | RL = 500 Ω, CL = 50 pF; -55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 1.9 | 3.9 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 4.5 to 5.5 V; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 4.1 | ns | RL = 1 MΩ, CL = 15 pF; VCC = 4.5 to 5.5 V; -55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay (A or B) to Y | tPLH, tPHL | 2.4 | 4.3 | ns | RL = 500 Ω, CL = 50 pF; TA = 25C | 5 | |
| Propagation Delay (A or B) to Y | tPLH, tPHL | 4.5 | ns | RL = 500 Ω, CL = 50 pF; -55C ≤ TA ≤ 125C | 5 |
CAD (KiCad official)
- Symbol:
NLV17SZ02DFT2G - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files:
nlv17sz02dft2g-etched.step/nlv17sz02dft2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nlv17sz02dft2g.step/nlv17sz02dft2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (13 pp, sha256
417b389a44e04772, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).