component
NLV14515BDWR2G
Public Made by Adomby adom
onsemi Latches, SOIC-24-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NLV14515BDWR2G
onsemi · Latches · SOIC-24-300mil
NLV14515BDWR2G from onsemi, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STROBE | input | Strobe input; data is transparent while Strobe = 1 and the last input data is latched when Strobe goes from 1 to 0. |
| 2 | D1 | input | Data input 1 (A, LSB) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 3 | D2 | input | Data input 2 (B) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 4 | S7 | output | Decoded output S7, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 5 | S6 | output | Decoded output S6, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 6 | S5 | output | Decoded output S5, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 7 | S4 | output | Decoded output S4, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 8 | S3 | output | Decoded output S3, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 9 | S1 | output | Decoded output S1, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 10 | S2 | output | Decoded output S2, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 11 | S0 | output | Decoded output S0, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 12 | VSS | power_in | Negative supply (ground) reference for all voltages; VDD is -0.5 to +18.0 V relative to it. |
| 13 | S13 | output | Decoded output S13, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 14 | S12 | output | Decoded output S12, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 15 | S15 | output | Decoded output S15, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 16 | S14 | output | Decoded output S14, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 17 | S9 | output | Decoded output S9, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 18 | S8 | output | Decoded output S8, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 19 | S11 | output | Decoded output S11, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 20 | S10 | output | Decoded output S10, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 21 | D3 | input | Data input 3 (C) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 22 | D4 | input | Data input 4 (D, MSB) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 23 | INHIBIT | input | Inhibit input; when high, all outputs go to 1 on the MC14515B regardless of the data inputs. |
| 24 | VDD | power_in | Positive supply voltage, 3.0 Vdc to 18 Vdc operating range, absolute maximum -0.5 to +18.0 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-24-300mil |
| Category | Logic |
| Pins | 24 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage "0" Level | VOL | 0.05 | Vdc | VDD = 5.0 Vdc; Vin = VDD or 0; TA = -55°C, 25°C and 125°C (same max at each) | 3 | ||
| Output Voltage "1" Level | VOH | 4.95 | Vdc | VDD = 5.0 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Output Voltage "1" Level | VOH | 9.95 | Vdc | VDD = 10 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Output Voltage "1" Level | VOH | 14.95 | Vdc | VDD = 15 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Input Voltage "0" Level | VIL | 1.5 | Vdc | VDD = 5.0 Vdc; VO = 4.5 or 0.5 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 | ||
| Input Voltage "0" Level | VIL | 3 | Vdc | VDD = 10 Vdc; VO = 9.0 or 1.0 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 | ||
| Input Voltage "0" Level | VIL | 4 | Vdc | VDD = 15 Vdc; VO = 13.5 or 1.5 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 | ||
| Input Voltage "1" Level | VIH | 3.5 | Vdc | VDD = 5.0 Vdc; VO = 0.5 or 4.5 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Input Voltage "1" Level | VIH | 7 | Vdc | VDD = 10 Vdc; VO = 1.0 or 9.0 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Input Voltage "1" Level | VIH | 11 | Vdc | VDD = 15 Vdc; VO = 1.5 or 13.5 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 | ||
| Output Drive Current (Source) | IOH | -1.2 | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Source) | IOH | -1 | -1.7 | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Source) | IOH | -0.7 | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Source) | IOH | -0.25 | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Source) | IOH | -0.2 | -0.36 | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Source) | IOH | -0.14 | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Source) | IOH | -0.62 | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Source) | IOH | -0.5 | -0.9 | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Source) | IOH | -0.35 | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Source) | IOH | -1.8 | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Source) | IOH | -1.5 | -3.5 | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Source) | IOH | -1.1 | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Sink) | IOL | 0.64 | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Sink) | IOL | 0.51 | 0.88 | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Sink) | IOL | 0.36 | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Sink) | IOL | 1.6 | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Sink) | IOL | 1.3 | 2.25 | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Sink) | IOL | 0.9 | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 125°C | 3 | ||
| Output Drive Current (Sink) | IOL | 4.2 | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = -55°C | 3 | ||
| Output Drive Current (Sink) | IOL | 3.4 | 8.8 | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 25°C | 3 | |
| Output Drive Current (Sink) | IOL | 2.4 | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 125°C | 3 | ||
| Input Current | Iin | -0.1 | 0.1 | Adc | VDD = 15 Vdc; TA = -55°C and 25°C | 3 | |
| Input Current | Iin | -1 | 1 | Adc | VDD = 15 Vdc; TA = 125°C | 3 | |
| Quiescent Current (Per Package) | IDD | 5 | Adc | Per package; VDD = 5.0 Vdc; TA = -55°C and 25°C | 3 | ||
| Quiescent Current (Per Package) | IDD | 150 | Adc | Per package; VDD = 5.0 Vdc; TA = 125°C | 3 | ||
| Quiescent Current (Per Package) | IDD | 10 | Adc | Per package; VDD = 10 Vdc; TA = -55°C and 25°C | 3 | ||
| Quiescent Current (Per Package) | IDD | 300 | Adc | Per package; VDD = 10 Vdc; TA = 125°C | 3 | ||
| Quiescent Current (Per Package) | IDD | 20 | Adc | Per package; VDD = 15 Vdc; TA = -55°C and 25°C | 3 | ||
| Quiescent Current (Per Package) | IDD | 600 | Adc | Per package; VDD = 15 Vdc; TA = 125°C | 3 | ||
| Input Capacitance | Cin | 5 | 7.5 | pF | Vin = 0 | 3 | |
| DC Supply Voltage Range | VDD | -0.5 | 18 | V | Voltages referenced to VSS | 1 | |
| Input or Output Voltage Range (DC or Transient) | Vin, Vout | -0.5 | V | Upper limit printed as VDD + 0.5 V; voltages referenced to VSS | 1 | ||
| Input or Output Current (DC or Transient) per pin | Iin, Iout | -10 | 10 | mA | Per pin | 1 | |
| Power Dissipation per Package | PD | 500 | mW | Note 1: plastic P and D/DW packages derate 7.0 mW/°C from 65°C to 125°C | 1 | ||
| Ambient Temperature Range | TA | -55 | 125 | °C | 1 | ||
| Storage Temperature Range | Tstg | -65 | 150 | °C | 1 | ||
| Lead Temperature | TL | 260 | °C | 8-second soldering | 1 | ||
| Supply Voltage Range | 3 | 18 | Vdc | Taken from Features bullet; no recommended operating conditions table printed | 1 | ||
| Output Rise Time | tTLH | 180 | 360 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 | |
| Output Rise Time | tTLH | 90 | 180 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 | |
| Output Rise Time | tTLH | 65 | 130 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 | |
| Output Fall Time | tTHL | 100 | 200 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 | |
| Output Fall Time | tTHL | 50 | 100 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 | |
| Output Fall Time | tTHL | 40 | 80 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 | |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | 550 | 1100 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 | |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | 225 | 450 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 | |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | 150 | 300 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 |
CAD (KiCad official)
- Symbol:
NLV14515BDWR2G - Footprint:
Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm - 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
- 3D model files:
nlv14515bdwr2g-etched.step/nlv14515bdwr2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nlv14515bdwr2g.step/nlv14515bdwr2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (10 pp, sha256
5bc8ec70815796c5, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NLV14515BDWR2G
**onsemi** · Latches · SOIC-24-300mil
NLV14515BDWR2G from onsemi, in a SOIC-24-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | STROBE | input | Strobe input; data is transparent while Strobe = 1 and the last input data is latched when Strobe goes from 1 to 0. |
| 2 | D1 | input | Data input 1 (A, LSB) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 3 | D2 | input | Data input 2 (B) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 4 | S7 | output | Decoded output S7, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 5 | S6 | output | Decoded output S6, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 6 | S5 | output | Decoded output S5, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 7 | S4 | output | Decoded output S4, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 8 | S3 | output | Decoded output S3, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 9 | S1 | output | Decoded output S1, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 10 | S2 | output | Decoded output S2, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 11 | S0 | output | Decoded output S0, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 12 | VSS | power_in | Negative supply (ground) reference for all voltages; VDD is -0.5 to +18.0 V relative to it. |
| 13 | S13 | output | Decoded output S13, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 14 | S12 | output | Decoded output S12, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 15 | S15 | output | Decoded output S15, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 16 | S14 | output | Decoded output S14, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 17 | S9 | output | Decoded output S9, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 18 | S8 | output | Decoded output S8, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 19 | S11 | output | Decoded output S11, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 20 | S10 | output | Decoded output S10, active low (logic 0 when selected) on the MC14515B; unused outputs must be left open. |
| 21 | D3 | input | Data input 3 (C) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 22 | D4 | input | Data input 4 (D, MSB) of the 4-bit address latch; input voltage must stay within VSS to VDD and unused inputs must be tied to VSS or VDD. |
| 23 | INHIBIT | input | Inhibit input; when high, all outputs go to 1 on the MC14515B regardless of the data inputs. |
| 24 | VDD | power_in | Positive supply voltage, 3.0 Vdc to 18 Vdc operating range, absolute maximum -0.5 to +18.0 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-24-300mil |
| Category | Logic |
| Pins | 24 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage "0" Level | VOL | | | 0.05 | Vdc | VDD = 5.0 Vdc; Vin = VDD or 0; TA = -55°C, 25°C and 125°C (same max at each) | 3 |
| Output Voltage "1" Level | VOH | 4.95 | | | Vdc | VDD = 5.0 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Output Voltage "1" Level | VOH | 9.95 | | | Vdc | VDD = 10 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Output Voltage "1" Level | VOH | 14.95 | | | Vdc | VDD = 15 Vdc; Vin = 0 or VDD; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Input Voltage "0" Level | VIL | | | 1.5 | Vdc | VDD = 5.0 Vdc; VO = 4.5 or 0.5 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 |
| Input Voltage "0" Level | VIL | | | 3 | Vdc | VDD = 10 Vdc; VO = 9.0 or 1.0 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 |
| Input Voltage "0" Level | VIL | | | 4 | Vdc | VDD = 15 Vdc; VO = 13.5 or 1.5 Vdc; TA = -55°C, 25°C and 125°C (same max at each) | 3 |
| Input Voltage "1" Level | VIH | 3.5 | | | Vdc | VDD = 5.0 Vdc; VO = 0.5 or 4.5 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Input Voltage "1" Level | VIH | 7 | | | Vdc | VDD = 10 Vdc; VO = 1.0 or 9.0 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Input Voltage "1" Level | VIH | 11 | | | Vdc | VDD = 15 Vdc; VO = 1.5 or 13.5 Vdc; TA = -55°C, 25°C and 125°C (same min at each) | 3 |
| Output Drive Current (Source) | IOH | -1.2 | | | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = -55°C | 3 |
| Output Drive Current (Source) | IOH | -1 | -1.7 | | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 25°C | 3 |
| Output Drive Current (Source) | IOH | -0.7 | | | mAdc | VDD = 5.0 Vdc; VOH = 2.5 Vdc; TA = 125°C | 3 |
| Output Drive Current (Source) | IOH | -0.25 | | | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = -55°C | 3 |
| Output Drive Current (Source) | IOH | -0.2 | -0.36 | | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 25°C | 3 |
| Output Drive Current (Source) | IOH | -0.14 | | | mAdc | VDD = 5.0 Vdc; VOH = 4.6 Vdc; TA = 125°C | 3 |
| Output Drive Current (Source) | IOH | -0.62 | | | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = -55°C | 3 |
| Output Drive Current (Source) | IOH | -0.5 | -0.9 | | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 25°C | 3 |
| Output Drive Current (Source) | IOH | -0.35 | | | mAdc | VDD = 10 Vdc; VOH = 9.5 Vdc; TA = 125°C | 3 |
| Output Drive Current (Source) | IOH | -1.8 | | | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = -55°C | 3 |
| Output Drive Current (Source) | IOH | -1.5 | -3.5 | | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 25°C | 3 |
| Output Drive Current (Source) | IOH | -1.1 | | | mAdc | VDD = 15 Vdc; VOH = 13.5 Vdc; TA = 125°C | 3 |
| Output Drive Current (Sink) | IOL | 0.64 | | | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = -55°C | 3 |
| Output Drive Current (Sink) | IOL | 0.51 | 0.88 | | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 25°C | 3 |
| Output Drive Current (Sink) | IOL | 0.36 | | | mAdc | VDD = 5.0 Vdc; VOL = 0.4 Vdc; TA = 125°C | 3 |
| Output Drive Current (Sink) | IOL | 1.6 | | | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = -55°C | 3 |
| Output Drive Current (Sink) | IOL | 1.3 | 2.25 | | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 25°C | 3 |
| Output Drive Current (Sink) | IOL | 0.9 | | | mAdc | VDD = 10 Vdc; VOL = 0.5 Vdc; TA = 125°C | 3 |
| Output Drive Current (Sink) | IOL | 4.2 | | | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = -55°C | 3 |
| Output Drive Current (Sink) | IOL | 3.4 | 8.8 | | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 25°C | 3 |
| Output Drive Current (Sink) | IOL | 2.4 | | | mAdc | VDD = 15 Vdc; VOL = 1.5 Vdc; TA = 125°C | 3 |
| Input Current | Iin | -0.1 | | 0.1 | Adc | VDD = 15 Vdc; TA = -55°C and 25°C | 3 |
| Input Current | Iin | -1 | | 1 | Adc | VDD = 15 Vdc; TA = 125°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 5 | Adc | Per package; VDD = 5.0 Vdc; TA = -55°C and 25°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 150 | Adc | Per package; VDD = 5.0 Vdc; TA = 125°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 10 | Adc | Per package; VDD = 10 Vdc; TA = -55°C and 25°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 300 | Adc | Per package; VDD = 10 Vdc; TA = 125°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 20 | Adc | Per package; VDD = 15 Vdc; TA = -55°C and 25°C | 3 |
| Quiescent Current (Per Package) | IDD | | | 600 | Adc | Per package; VDD = 15 Vdc; TA = 125°C | 3 |
| Input Capacitance | Cin | | 5 | 7.5 | pF | Vin = 0 | 3 |
| DC Supply Voltage Range | VDD | -0.5 | | 18 | V | Voltages referenced to VSS | 1 |
| Input or Output Voltage Range (DC or Transient) | Vin, Vout | -0.5 | | | V | Upper limit printed as VDD + 0.5 V; voltages referenced to VSS | 1 |
| Input or Output Current (DC or Transient) per pin | Iin, Iout | -10 | | 10 | mA | Per pin | 1 |
| Power Dissipation per Package | PD | | | 500 | mW | Note 1: plastic P and D/DW packages derate 7.0 mW/°C from 65°C to 125°C | 1 |
| Ambient Temperature Range | TA | -55 | | 125 | °C | | 1 |
| Storage Temperature Range | Tstg | -65 | | 150 | °C | | 1 |
| Lead Temperature | TL | | | 260 | °C | 8-second soldering | 1 |
| Supply Voltage Range | | 3 | | 18 | Vdc | Taken from Features bullet; no recommended operating conditions table printed | 1 |
| Output Rise Time | tTLH | | 180 | 360 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 |
| Output Rise Time | tTLH | | 90 | 180 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 |
| Output Rise Time | tTLH | | 65 | 130 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 |
| Output Fall Time | tTHL | | 100 | 200 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 |
| Output Fall Time | tTHL | | 50 | 100 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 |
| Output Fall Time | tTHL | | 40 | 80 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | | 550 | 1100 | ns | CL = 50 pF, TA = 25°C; VDD = 5.0 Vdc | 4 |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | | 225 | 450 | ns | CL = 50 pF, TA = 25°C; VDD = 10 Vdc | 4 |
| Propagation Delay Time; Data, Strobe to S | tPLH, tPHL | | 150 | 300 | ns | CL = 50 pF, TA = 25°C; VDD = 15 Vdc | 4 |
## CAD (KiCad official)
- Symbol: `NLV14515BDWR2G`
- Footprint: `Package_SO:SOIC-24W_7.5x15.4mm_P1.27mm`
- 3D model: SOIC-24-300mil (KiCad packages3D, STEP)
- 3D model files: `nlv14515bdwr2g-etched.step` / `nlv14515bdwr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nlv14515bdwr2g.step` / `nlv14515bdwr2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588931375370555392) (10 pp, sha256 `5bc8ec70815796c5`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/nlv14515bdwr2g-datasheet.pdf)