component
NL27WZ04DFT2G
Public Made by Adomby adom
onsemi Inverters, SC-70-6(SOT-363). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+10−7@@ -32,37 +32,37 @@ "number": "1", "name": "IN A1", "type": "input",- "description": "Logic input to inverter 1. LVTTL/LVCMOS compatible, high-impedance input; VIH = 0.7\u00b7VCC (0.75\u00b7VCC below 2.3 V VCC), VIL = 0.3\u00b7VCC. Tolerates up to 5.5 V regardless of VCC."+ "description": "Logic input to inverter 1. LVTTL/LVCMOS compatible, high-impedance input; VIH = 0.7·VCC (0.75·VCC below 2.3 V VCC), VIL = 0.3·VCC. Tolerates up to 5.5 V regardless of VCC." }, { "number": "2", "name": "GND", "type": "power_in",- "description": "Ground reference (0 V). Maximum DC ground current per pin is \u00b1100 mA."+ "description": "Ground reference (0 V). Maximum DC ground current per pin is ±100 mA." }, { "number": "3", "name": "IN A2", "type": "input",- "description": "Logic input to inverter 2. LVTTL/LVCMOS compatible, high-impedance input; VIH = 0.7\u00b7VCC (0.75\u00b7VCC below 2.3 V VCC), VIL = 0.3\u00b7VCC. Tolerates up to 5.5 V regardless of VCC."+ "description": "Logic input to inverter 2. LVTTL/LVCMOS compatible, high-impedance input; VIH = 0.7·VCC (0.75·VCC below 2.3 V VCC), VIL = 0.3·VCC. Tolerates up to 5.5 V regardless of VCC." }, { "number": "4", "name": "OUT Y2", "type": "output",- "description": "Inverted logic output of inverter 2 (Y2 = /A2). Push-pull CMOS output with 24 mA balanced sink/source capability; VOH \u2248 VCC\u22120.1 V and VOL \u2248 0.1 V at 100 \u00b5A load."+ "description": "Inverted logic output of inverter 2 (Y2 = /A2). Push-pull CMOS output with 24 mA balanced sink/source capability; VOH ≈ VCC−0.1 V and VOL ≈ 0.1 V at 100 µA load." }, { "number": "5", "name": "VCC", "type": "power_in",- "description": "Positive supply. Operating range 1.65 V to 5.5 V (1.5 V min for data retention only). Recommend local 0.1 \u00b5F decoupling to GND."+ "description": "Positive supply. Operating range 1.65 V to 5.5 V (1.5 V min for data retention only). Recommend local 0.1 µF decoupling to GND." }, { "number": "6", "name": "OUT Y1", "type": "output",- "description": "Inverted logic output of inverter 1 (Y1 = /A1). Push-pull CMOS output with 24 mA balanced sink/source capability; VOH \u2248 VCC\u22120.1 V and VOL \u2248 0.1 V at 100 \u00b5A load."+ "description": "Inverted logic output of inverter 1 (Y1 = /A1). Push-pull CMOS output with 24 mA balanced sink/source capability; VOH ≈ VCC−0.1 V and VOL ≈ 0.1 V at 100 µA load." } ], "provenance": {@@ -126,5 +126,8 @@ "docs/nl27wz04dft2g-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }