component
NL17SZ08XV5T2GH
Public Made by Adomby adom
onsemi Logic Gates, SOT-553-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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NL17SZ08XV5T2GH
onsemi · Logic Gates · SOT-553-5
NL17SZ08XV5T2GH from onsemi, in a SOT-553-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Logic input B of the 2-input AND gate, overvoltage tolerant up to 5.5 V and supporting partial power-down (IOFF) protection. |
| 2 | A | input | Logic input A of the 2-input AND gate, overvoltage tolerant up to 5.5 V and supporting partial power-down (IOFF) protection. |
| 3 | GND | power_in | Ground reference for the device. |
| 4 | Y | output | AND gate output (Y = A·B) that sources or sinks 24 mA at 3.0 V and is overvoltage tolerant up to 5.5 V. |
| 5 | VCC | power_in | Positive supply pin, rated for 1.65 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOT-553-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| DC Supply Voltage | VCC | -0.5 | 6.5 | V | 3 | ||
| DC Input Voltage | VIN | -0.5 | 6.5 | V | 3 | ||
| DC Output Voltage, Active-Mode (High or Low State) | VOUT | -0.5 | V | Active-Mode (High or Low State); printed max is VCC + 0.5 | 3 | ||
| DC Output Voltage, Tri-State Mode | VOUT | -0.5 | 6.5 | V | Tri-State Mode (Note 1) | 3 | |
| DC Output Voltage, Power-Down Mode | VOUT | -0.5 | 6.5 | V | Power-Down Mode (VCC = 0 V) | 3 | |
| DC Input Diode Current | IIK | -50 | mA | VIN < GND | 3 | ||
| DC Output Diode Current | IOK | -50 | mA | VOUT < GND | 3 | ||
| DC Output Source/Sink Current | IOUT | -50 | 50 | mA | 3 | ||
| DC Supply Current per Supply Pin or Ground Pin | ICC or IGND | -100 | 100 | mA | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | 3 | |||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 secs | 3 | ||
| Thermal Resistance, junction-to-ambient (Note 2) | θJA | 324 | °C/W | SOT-553; FR4, minimum pad spacing, JESD51-7 | 3 | ||
| Power Dissipation in Still Air | PD | 386 | mW | SOT-553; still air | 3 | ||
| ESD Withstand Voltage, Human Body Model | VESD | 2000 | V | Human Body Model | 3 | ||
| ESD Withstand Voltage, Charged Device Model | VESD | 1000 | V | Charged Device Model | 3 | ||
| Latchup Performance | ILatchup | 100 | mA | Tested to EIA/JESD78 Class II | 3 | ||
| Positive DC Supply Voltage | VCC | 1.65 | 5.5 | V | 4 | ||
| DC Input Voltage | VIN | 0 | 5.5 | V | 4 | ||
| DC Output Voltage, Active-Mode (High or Low State) | VOUT | 0 | V | Active-Mode (High or Low State); printed max is VCC | 4 | ||
| DC Output Voltage, Tri-State Mode | VOUT | 0 | 5.5 | V | Tri-State Mode (Note 1) | 4 | |
| DC Output Voltage, Power-Down Mode | VOUT | 0 | 5.5 | V | Power-Down Mode (VCC = 0 V) | 4 | |
| Operating Temperature Range | TA | -55 | 125 | °C | 4 | ||
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 1.65 V to 1.95 V | 4 | |
| Input Rise and Fall Time | tr, tf | 0 | 10 | ns/V | VCC = 3.0 V to 3.6 V | 4 | |
| Input Rise and Fall Time | tr, tf | 0 | 5 | ns/V | VCC = 4.5 V to 5.5 V | 4 | |
| High-Level Output Voltage | VOH | 1.29 | 1.4 | V | VIN = VIH or VIL, IOH = −4 mA, VCC = 1.65 V, TA = 25C | 4 | |
| High-Level Output Voltage | VOH | 1.9 | 2.1 | V | VIN = VIH or VIL, IOH = −8 mA, VCC = 2.3 V, TA = 25C | 4 | |
| High-Level Output Voltage | VOH | 2.2 | 2.4 | V | VIN = VIH or VIL, IOH = −12 mA, VCC = 2.7 V, TA = 25C | 4 | |
| High-Level Output Voltage | VOH | 2.4 | 2.7 | V | VIN = VIH or VIL, IOH = −16 mA, VCC = 3.0 V, TA = 25C | 4 | |
| High-Level Output Voltage | VOH | 2.3 | 2.5 | V | VIN = VIH or VIL, IOH = −24 mA, VCC = 3.0 V, TA = 25C | 4 | |
| High-Level Output Voltage | VOH | 3.8 | 4 | V | VIN = VIH or VIL, IOH = −32 mA, VCC = 4.5 V, TA = 25C | 4 | |
| Low-Level Output Voltage | VOL | 0.1 | V | VIN = VIH or VIL, IOL = 100 µA, VCC = 1.65 to 5.5 V, TA = 25C | 4 | ||
| Low-Level Output Voltage | VOL | 0.24 | V | VIN = VIH or VIL, IOL = 4 mA, VCC = 1.65 V, TA = 25C | 4 | ||
| Low-Level Output Voltage | VOL | 0.3 | V | VIN = VIH or VIL, IOL = 8 mA, VCC = 2.3 V, TA = 25C | 4 | ||
| Low-Level Output Voltage | VOL | 0.4 | V | VIN = VIH or VIL, IOL = 12 mA, VCC = 2.7 V, TA = 25C | 4 | ||
| Low-Level Output Voltage | VOL | 0.55 | V | VIN = VIH or VIL, IOL = 24 mA, VCC = 3.0 V, TA = 25C | 4 | ||
| Input Leakage Current | IIN | -0.1 | 0.1 | µA | VIN = 5.5 V or GND, VCC = 1.65 to 5.5 V, TA = 25C | 4 | |
| Input Leakage Current | IIN | -1 | 1 | µA | VIN = 5.5 V or GND, VCC = 1.65 to 5.5 V, −55C ≤ TA ≤ 125C | 4 | |
| Power Off Leakage Current | IOFF | 1 | µA | VCC = 0 V, VIN = 5.5 V or VOUT = 5.5 V, TA = 25C | 4 | ||
| Power Off Leakage Current | IOFF | 10 | µA | VCC = 0 V, VIN = 5.5 V or VOUT = 5.5 V, −55C ≤ TA ≤ 125C | 4 | ||
| Quiescent Supply Current | ICC | 1 | µA | VCC = 5.5 V, VIN = VCC or GND, TA = 25C | 4 | ||
| Quiescent Supply Current | ICC | 10 | µA | VCC = 5.5 V, VIN = VCC or GND, −55C ≤ TA ≤ 125C | 4 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 6.3 | 12 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 1.65 to 1.95 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 12.7 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 1.65 to 1.95 V, −55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 3.4 | 7 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 2.3 to 2.7 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 7.5 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 2.3 to 2.7 V, −55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 2.6 | 4.7 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 3.0 to 3.6 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 5 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 3.0 to 3.6 V, −55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 3.3 | 5.2 | ns | RL = 500 Ω, CL = 50 pF, VCC = 3.0 to 3.6 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 5.5 | ns | RL = 500 Ω, CL = 50 pF, VCC = 3.0 to 3.6 V, −55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 2.2 | 4.1 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 4.5 to 5.5 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 4.4 | ns | RL = 1 MΩ, CL = 15 pF, VCC = 4.5 to 5.5 V, −55C ≤ TA ≤ 125C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 2.7 | 4.5 | ns | RL = 500 Ω, CL = 50 pF, VCC = 4.5 to 5.5 V, TA = 25C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 4.8 | ns | RL = 500 Ω, CL = 50 pF, VCC = 4.5 to 5.5 V, −55C ≤ TA ≤ 125C | 5 |
CAD (KiCad official)
- Symbol:
NL17SZ08XV5T2GH - Footprint:
Package_TO_SOT_SMD:SOT-553 - 3D model: SOT-553-5 (KiCad packages3D, STEP)
- 3D model files:
nl17sz08xv5t2gh-etched.step/nl17sz08xv5t2gh-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);nl17sz08xv5t2gh.step/nl17sz08xv5t2gh.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (14 pp, sha256
50da0cb4eac06b7a, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).