# NL17SZ08DFT2G-TP

**TECH PUBLIC** · Logic Gates · SOT-353

NL17SZ08DFT2G-TP from TECH PUBLIC, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN B | input | Logic input B of the 2-input AND gate; recommended input voltage 0 to 5.5 V. |
| 2 | IN A | input | Logic input A of the 2-input AND gate; recommended input voltage 0 to 5.5 V. |
| 3 | GND | power_in | Ground pin (0 V reference) for the device. |
| 4 | OUT Y | output | Gate output Y = A×B, with ±24 mA output drive at VCC=3.0 V. |
| 5 | VCC | power_in | Supply voltage pin, recommended operating range 1.65 V to 5.5 V (absolute maximum -0.5 to +6.5 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-353 |
| Category | Logic |
| Pins | 5 |

## CAD (KiCad official)

- Symbol: `NL17SZ08DFT2G-TP`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files: `nl17sz08dft2g-tp-etched.step` / `nl17sz08dft2g-tp-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `nl17sz08dft2g-tp.step` / `nl17sz08dft2g-tp.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](docs/nl17sz08dft2g-tp-datasheet.pdf) (5 pp, sha256 `101f29b46b54d093`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nl17sz08dft2g-tp-datasheet.pdf)