component
NJM78L09UA-TE1
Public Made by Adomby adom
JRC Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NJM78L09UA-TE1
JRC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
NJM78L09UA-TE1 from JRC, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated 9 V output with 9.0 V typical and 8.55 V to 9.45 V limits at VIN=15 V and IO=40 mA, guaranteed for 100 mA output current when adequate heat sinking is provided. |
| 2 | GND | power_in | Common ground return for the regulator, to which the CIN and CO capacitors should be connected by the shortest path. |
| 3 | IN | power_in | Unregulated input with an absolute maximum of 30 V for the 78L09A, and an input capacitor of at least 0.33 µF should be connected between IN and GND as close as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JRC |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 8.55 | 9 | 9.45 | V | VIN=15V, IO=40mA | 4 |
| Line Regulation 1 | ΔVO-VIN1 | 250 | mV | VIN=11.5V to 23V, IO=40mA | 4 | ||
| Line Regulation 2 | ΔVO-VIN2 | 200 | mV | VIN=12V to 23V, IO=40mA | 4 | ||
| Load Regulation 1 | ΔVO-IO1 | 50 | mV | VIN=15V, IO=1 to 40mA | 4 | ||
| Load Regulation 2 | ΔVO-IO2 | 100 | mV | VIN=15V, IO=1 to 100mA | 4 | ||
| Quiescent Current | IQ | 2.1 | 6 | mA | VIN=15V, IO=0mA | 4 | |
| Ripple Rejection | RR | 38 | 65 | dB | 12V< VIN <21V, IO=40mA, ein=1VP-P, f=120Hz | 4 | |
| Input Voltage (78L02A to 78L09A) | VIN | 30 | V | 78L02A to 78L09A | 2 | ||
| Power Dissipation | PD | 350 | mW | SOT-89 package | 2 | ||
| Operating Temperature Range | Topr | -40 | 85 | °C | 2 | ||
| Storage Temperature Range | Tstg | -40 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
NJM78L09UA-TE1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
njm78l09ua-te1-etched.step/njm78l09ua-te1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);njm78l09ua-te1.step/njm78l09ua-te1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: JRC datasheet (9 pp, sha256
1886f25e0129aa8d, retrieved 2026-10-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NJM78L09UA-TE1
**JRC** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89
NJM78L09UA-TE1 from JRC, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated 9 V output with 9.0 V typical and 8.55 V to 9.45 V limits at VIN=15 V and IO=40 mA, guaranteed for 100 mA output current when adequate heat sinking is provided. |
| 2 | GND | power_in | Common ground return for the regulator, to which the CIN and CO capacitors should be connected by the shortest path. |
| 3 | IN | power_in | Unregulated input with an absolute maximum of 30 V for the 78L09A, and an input capacitor of at least 0.33 µF should be connected between IN and GND as close as possible. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | JRC |
| Package | SOT-89 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 8.55 | 9 | 9.45 | V | VIN=15V, IO=40mA | 4 |
| Line Regulation 1 | ΔVO-VIN1 | | | 250 | mV | VIN=11.5V to 23V, IO=40mA | 4 |
| Line Regulation 2 | ΔVO-VIN2 | | | 200 | mV | VIN=12V to 23V, IO=40mA | 4 |
| Load Regulation 1 | ΔVO-IO1 | | | 50 | mV | VIN=15V, IO=1 to 40mA | 4 |
| Load Regulation 2 | ΔVO-IO2 | | | 100 | mV | VIN=15V, IO=1 to 100mA | 4 |
| Quiescent Current | IQ | | 2.1 | 6 | mA | VIN=15V, IO=0mA | 4 |
| Ripple Rejection | RR | 38 | 65 | | dB | 12V< VIN <21V, IO=40mA, ein=1VP-P, f=120Hz | 4 |
| Input Voltage (78L02A to 78L09A) | VIN | | | 30 | V | 78L02A to 78L09A | 2 |
| Power Dissipation | PD | | | 350 | mW | SOT-89 package | 2 |
| Operating Temperature Range | Topr | -40 | | 85 | °C | | 2 |
| Storage Temperature Range | Tstg | -40 | | 150 | °C | | 2 |
## CAD (KiCad official)
- Symbol: `NJM78L09UA-TE1`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `njm78l09ua-te1-etched.step` / `njm78l09ua-te1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `njm78l09ua-te1.step` / `njm78l09ua-te1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [JRC datasheet](docs/njm78l09ua-te1-datasheet.pdf) (9 pp, sha256 `1886f25e0129aa8d`, retrieved 2026-10-29, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/njm78l09ua-te1-datasheet.pdf)