component
NJM78L05SU3-TE1
Public Made by Adomby adom
Nisshinbo Micro Devices Inc. Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
NJM78L05SU3-TE1
Nisshinbo Micro Devices Inc. · Linear Voltage Regulators (LDO) · SOT-89-3
NJM78L05SU3-TE1 from Nisshinbo Micro Devices Inc., in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated 5V output (4.8 to 5.2V at VIN=10V, IO=40mA), up to 100mA max; requires output capacitor CO of 0.1µF or larger connected to GND as short as possible. |
| 2 | GND | power_in | Ground pin common to input and output. |
| 3 | VIN | power_in | Unregulated input voltage, absolute maximum 30V for NJM78L05S; requires input capacitor CIN of 0.33µF or larger connected to GND as short as possible. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nisshinbo Micro Devices Inc. |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 4.8 | 5 | 5.2 | V | VIN=10V, IO=40mA | 3 |
| Line Regulation 1 | ΔVO-VIN1 | 200 | mV | VIN=7V to 20V, IO=40mA | 3 | ||
| Line Regulation 2 | ΔVO-VIN2 | 150 | mV | VIN=8V to 20V, IO=40mA | 3 | ||
| Load Regulation 1 | ΔVO-IO1 | 30 | mV | VIN=10V, IO=1 to 40mA | 3 | ||
| Load Regulation 2 | ΔVO-IO2 | 60 | mV | VIN=10V, IO=1 to 100mA | 3 | ||
| Quiescent Current | IQ | 2 | 6 | mA | VIN=10V, IO=0mA | 3 | |
| Ripple Rejection | RR | 40 | 69 | dB | 8V<VIN<18V, IO=40mA, ein=1VP-P, f=120Hz | 3 | |
| Average Temperature Coefficient of Output Voltage | ΔVO/ΔT | 0.4 | mV/ºC | VIN=10V, IO=1mA | 3 | ||
| Output Noise Voltage | VNO | 70 | µVrms | VIN=10V, BW=10Hz to 100kHz, IO=40mA | 3 | ||
| Dropout Voltage | ΔVIO | 1.7 | V | IO=100mA | 3 | ||
| Input Voltage | VIN | 30 | V | NJM78L03S to NJM78L08S, Ta=25ºC | 2 | ||
| Power Dissipation (2 layers) | PD | 625 | mW | (*1) glass epoxy board, 2 layers, copper area 100mm2 | 2 | ||
| Power Dissipation (4 layers) | PD | 2400 | mW | (*2) glass epoxy board, 4 layers | 2 | ||
| Junction Temperature Range | Tj | -40 | 150 | °C | 2 | ||
| Operating Temperature Range | Topr | -40 | 125 | °C | 2 | ||
| Storage Temperature Range | Tstg | -50 | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
NJM78L05SU3-TE1 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
njm78l05su3-te1-etched.step/njm78l05su3-te1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);njm78l05su3-te1.step/njm78l05su3-te1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nisshinbo Micro Devices Inc. datasheet (13 pp, sha256
b1e5f3802ec40e9c, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NJM78L05SU3-TE1
**Nisshinbo Micro Devices Inc.** · Linear Voltage Regulators (LDO) · SOT-89-3
NJM78L05SU3-TE1 from Nisshinbo Micro Devices Inc., in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated 5V output (4.8 to 5.2V at VIN=10V, IO=40mA), up to 100mA max; requires output capacitor CO of 0.1µF or larger connected to GND as short as possible. |
| 2 | GND | power_in | Ground pin common to input and output. |
| 3 | VIN | power_in | Unregulated input voltage, absolute maximum 30V for NJM78L05S; requires input capacitor CIN of 0.33µF or larger connected to GND as short as possible. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nisshinbo Micro Devices Inc. |
| Package | SOT-89-3 |
| Category | Power Supply Chip |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage | VO | 4.8 | 5 | 5.2 | V | VIN=10V, IO=40mA | 3 |
| Line Regulation 1 | ΔVO-VIN1 | | | 200 | mV | VIN=7V to 20V, IO=40mA | 3 |
| Line Regulation 2 | ΔVO-VIN2 | | | 150 | mV | VIN=8V to 20V, IO=40mA | 3 |
| Load Regulation 1 | ΔVO-IO1 | | | 30 | mV | VIN=10V, IO=1 to 40mA | 3 |
| Load Regulation 2 | ΔVO-IO2 | | | 60 | mV | VIN=10V, IO=1 to 100mA | 3 |
| Quiescent Current | IQ | | 2 | 6 | mA | VIN=10V, IO=0mA | 3 |
| Ripple Rejection | RR | 40 | 69 | | dB | 8V<VIN<18V, IO=40mA, ein=1VP-P, f=120Hz | 3 |
| Average Temperature Coefficient of Output Voltage | ΔVO/ΔT | | 0.4 | | mV/ºC | VIN=10V, IO=1mA | 3 |
| Output Noise Voltage | VNO | | 70 | | µVrms | VIN=10V, BW=10Hz to 100kHz, IO=40mA | 3 |
| Dropout Voltage | ΔVIO | | 1.7 | | V | IO=100mA | 3 |
| Input Voltage | VIN | | | 30 | V | NJM78L03S to NJM78L08S, Ta=25ºC | 2 |
| Power Dissipation (2 layers) | PD | | | 625 | mW | (*1) glass epoxy board, 2 layers, copper area 100mm2 | 2 |
| Power Dissipation (4 layers) | PD | | | 2400 | mW | (*2) glass epoxy board, 4 layers | 2 |
| Junction Temperature Range | Tj | -40 | | 150 | °C | | 2 |
| Operating Temperature Range | Topr | -40 | | 125 | °C | | 2 |
| Storage Temperature Range | Tstg | -50 | | 150 | °C | | 2 |
## CAD (KiCad official)
- Symbol: `NJM78L05SU3-TE1`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files: `njm78l05su3-te1-etched.step` / `njm78l05su3-te1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `njm78l05su3-te1.step` / `njm78l05su3-te1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nisshinbo Micro Devices Inc. datasheet](docs/njm78l05su3-te1-datasheet.pdf) (13 pp, sha256 `b1e5f3802ec40e9c`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/njm78l05su3-te1-datasheet.pdf)