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NJM4558DD

JRC · Operational Amplifier · DIP-8

NJM4558DD from JRC, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A OUTPUT output Output of op-amp channel A; the datasheet gives no pin-level electrical limits for this pin.
2 A -INPUT input Inverting input of op-amp channel A.
3 A +INPUT input Non-inverting input of op-amp channel A; input common-mode voltage range is ±12V minimum at ±15V supply.
4 V- power_in Negative supply rail; operating supply range is ±4V to ±18V with an absolute maximum of ±18V.
5 B +INPUT input Non-inverting input of op-amp channel B; input common-mode voltage range is ±12V minimum at ±15V supply.
6 B -INPUT input Inverting input of op-amp channel B.
7 B OUTPUT output Output of op-amp channel B; the datasheet gives no pin-level electrical limits for this pin.
8 V+ power_in Positive supply rail; operating supply range is ±4V to ±18V with an absolute maximum of ±18V.

Key specifications

Parameter Value
Manufacturer JRC
Package DIP-8
Category Amplifiers/Comparators
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Resistance RIN 0.3 5 MΩ 2
Large Signal Voltage Gain AV 86 100 dB RL≥2kΩ, VO=±10V 2
Maximum Output Voltage Swing 1 VOM1 12 14 V RL≥10kΩ; MIN column printed as ±12 2
Maximum Output Voltage Swing 2 VOM2 10 13 V RL≥2kΩ; MIN column printed as ±10 2
Input Common Mode Voltage Range VICM 12 14 V 2
Common Mode Rejection Ratio CMR 70 90 dB RS≤10kΩ 2
Supply Voltage Rejection Ratio SVR 76.5 90 dB RS≤10kΩ 2
Input Offset Voltage VIO 0.5 6 mV RS≤10kΩ 2
Input Offset Current IIO 5 200 nA 2
Input Bias Current IB 25 500 nA 2
Operating Current ICC 3.5 5.7 mA 2
Supply Voltage V+/V- -18 18 V Printed as ±18 V 2
Differential Input Voltage VID -30 30 V Printed as ±30 V 2
Input Voltage VIC -15 15 V Printed as ±15 V; note1: for supply voltage less than ±15V, the absolute maximum input voltage equals the supply voltage 2
Power Dissipation (DIP8) PD 500 mW DIP8 package 2
Operating Temperature Range Topr -40 85 ˚C 2
Storage Temperature Range Tstg -40 125 ˚C 2
Operating Voltage (supply) 4 18 V Features list gives ±4V~±18V 1

CAD (KiCad official)

  • Symbol: NJM4558DD
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D, STEP)
  • 3D model files: njm4558dd-etched.step / njm4558dd-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); njm4558dd.step / njm4558dd.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JRC datasheet (4 pp, sha256 2a1e31940cf42b74, retrieved 2026-10-15, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF