# NIS5420MT7TXG

**onsemi** · Surge Suppressors · WDFN-10(3x3)

NIS5420MT7TXG from onsemi, in a WDFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Negative input voltage to the device, used as the internal reference for the IC. |
| 2 | dv/dt | passive | Controls output voltage slew rate at turn-on with an internal capacitor giving about a 2 ms ramp; an external capacitor can be added to lengthen it, or leave open if no extra delay is needed. |
| 3 | En/Flt | bidirectional | Tri-state bidirectional enable/fault pin that is pulled to ground by an open-drain device to shut down the eFuse, reads about 1.4 V in thermal shutdown and about 3 V in normal operation; do not actively drive it or connect a capacitor. |
| 4 | ILIM | passive | A resistor between this pin and the source pin sets the overload and short-circuit current limit levels. |
| 5 | ISENSE | output | Load current monitor output that lets the system monitor load current in real time (1 mA/A typical with RSENSE = 1 kΩ); connect RSENSE to GND. |
| 6 | Src | power_out | Source of the internal power FET and the output terminal of the fuse. |
| 7 | Src | power_out | Source of the internal power FET and the output terminal of the fuse. |
| 8 | Src | power_out | Source of the internal power FET and the output terminal of the fuse. |
| 9 | Src | power_out | Source of the internal power FET and the output terminal of the fuse. |
| 10 | Src | power_out | Source of the internal power FET and the output terminal of the fuse. |
| 11 | VCC | power_in | Positive input voltage to the device (belly pad), operating 8 V to 18 V steady-state. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | WDFN-10(3x3) |
| Category | TVS/Fuse/Board Level Protection |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage, operating, steady-state | VIN | -0.6 |  | 18 | V | VCC to GND | 3 |
| Input Voltage, transient | VIN | -0.6 |  | 25 | V | Transient (100 ms) | 3 |
| Operating Ambient Temperature Range | TA | -40 |  | 125 | °C |  | 3 |
| Operating Junction Temperature Range | TJ | -40 |  | 150 | °C |  | 3 |
| Non-operating Temperature Range | TSTG | -55 |  | 155 | °C |  | 3 |
| Lead Temperature, Soldering | TL |  |  | 260 | °C | 10 Sec | 3 |
| Total Power Dissipation | Pmax |  |  | 1.39 | W | TA = 25°C, 4 layer High-K JEDEC JESD51-7 PCB, 100 mm2, 2 oz. Cu | 3 |
| Kelvin ON Resistance | RDSon | 30 | 39 | 50 | mΩ | VCC = 12 V, Tj = 25°C | 4 |
| Off State Output Voltage | Voff |  |  | 50 | mV | VCC = 18 Vdc, VGS = 0 Vdc, RL = ∞ | 4 |
| Continuous Current | ID |  |  | 4.6 | A | TA = 25°C, 100 mm2 copper | 4 |
| Continuous Current | ID |  |  | 3.5 | A | TA = 80°C, minimum copper | 4 |
| Shutdown Temperature | TSD | 150 | 175 | 200 | °C | Verified by design | 4 |
| Thermal Shutdown Response Time | TSDRes | 10 | 15 | 20 | µs |  | 4 |
| Output Clamping Voltage | VClamp1 | 12.5 |  | 14.5 | V | NIS5420MT2, NIS5420MT7 | 4 |
| Output Clamping Response Time | TClamp_Res |  |  | 10 | µs |  | 4 |
| Undervoltage Lockout | VUVLO2 | 6 | 6.5 | 7 | V | NIS5420MT2, NIS5420MT6, NIS5420MT8 column | 4 |
| Kelvin Short Circuit Current Limit | ILim-SS | 1.76 | 2.1 | 2.64 | A | RLimit = 20 Ω | 4 |
| Logic Level Low (Output Disabled) | Vin-low | 0.35 | 0.58 | 0.81 | V |  | 4 |
| Logic Level Mid (Thermal Fault, Output Disabled) | Vin-mid | 0.82 | 1.4 | 1.95 | V |  | 4 |
| Logic Level High (Output Enabled) | Vin-high | 1.96 | 2.6 | 3 | V |  | 4 |
| High State Maximum Voltage | Vin-max | 2.51 | 4.6 | 5 | V |  | 4 |
| Logic Low Sink Current | Iin-low |  | -15 | -25 | µA | Venable = 0 V | 4 |
| Logic High Leakage Current for External Switch | Iin-leak |  |  | 1 | µA | Venable = 3.3 V | 4 |
| Maximum Fanout for Fault Signal | Fan |  |  | 3 | Units | Total number of chips that can be connected to this pin for simultaneous shutdown | 4 |
| Bias Current (Operational) | IBias |  |  | 450 | µA |  | 4 |
| Bias Current (Shutdown) | IBias |  |  | 150 | µA |  | 4 |
| Minimum Operating Voltage | Vmin |  |  | 7.7 | V | Notes 3 and 5 | 4 |
| Current Monitor Sense Accuracy | IACC | -10 |  | 10 | % |  | 4 |
| Thermal Resistance, Junction-to-Air | RθJA |  | 90 |  | °C/W | 4 layer High-K JEDEC JESD51-7 PCB, 100 mm2, 2 oz. Cu | 3 |
| Thermal Characterization Parameter, Junction-to-Lead | ψJ-L |  | 27.5 |  | °C/W | 4 layer High-K JEDEC JESD51-7 PCB, 100 mm2, 2 oz. Cu | 3 |
| Thermal Characterization Parameter, Junction-to-Board | ψJ-B |  | 27.5 |  | °C/W | 4 layer High-K JEDEC JESD51-7 PCB, 100 mm2, 2 oz. Cu | 3 |
| Thermal Characterization Parameter, Junction-to-Case Top | ψJ-T |  | 7.6 |  | °C/W | 4 layer High-K JEDEC JESD51-7 PCB, 100 mm2, 2 oz. Cu | 3 |
| Delay Time | Tdly |  | 220 |  | µs | Enabling of chip to ID = 100 mA with 1 A resistive load | 4 |
| Kelvin ON Resistance | RDSon |  | 60 |  | mΩ | TJ = 140°C | 4 |
| Thermal Hysteresis | THyst |  | 45 |  | °C | Auto-retry part only | 4 |
| UVLO Hysteresis | VHyst |  | 0.8 |  | V |  | 4 |
| Kelvin Overload Current Limit | ILim-OL |  | 4.2 |  | A | RLimit = 20 Ω | 4 |
| Output Voltage Ramp Time | tslew |  | 2 |  | ms | VOUT = 1.2 V to 10.8 V with 12 Ω load | 4 |
| Current Monitor Sense | ISENSE |  | 1 |  | mA/A | RSENSE = 1 kΩ | 4 |

## CAD (KiCad official)

- Symbol: `NIS5420MT7TXG`
- Footprint: `Package_DFN_QFN:WDFN-10-1EP_3x3mm_P0.5mm_EP1.8x2.5mm`
- 3D model: WDFN-10(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.75 mm nominal WSON height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/nis5420mt7tx-d.pdf) (13 pp, sha256 `70fd2199cbdacd78`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/nis5420mt7txg-datasheet.pdf)