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NIS5135MN2TXG

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onsemi Resettable Fuses, DFN-10(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttvs-fuse-board level protectionnis5135mn2txgfactory-2.0.0extractor-text

Verified NIS5135MN2TXG

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 11 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: NIS5135MN2TXG · DFN-10(3x3) · 11 pins
  • ✓copper: 11 copper pads, none touching another net
  • ✓datasheet: all 11 pin names found in the 12-page datasheet
  • ✓distributor: lcsc C463866, digikey NIS5135MN2TXGTR-ND, mouser 863-NIS5135MN2TXG
  • ✓family: DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • ✓files: 6 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-wgcslvvu/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 1 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare (datasheet p.11)
  • ✓pads: 11 pins = 11 pads
  • ✓pose: 1 STEP(s) Z-up, seated, centred
  • ✓symbol: 11 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ nis5135mn2txg.kicad_sym✓ nis5135mn2txg.kicad_mod✓ nis5135mn2txg.step
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verification.json Verified: Published by the parts factory: tier mfr, 11 pins · Ray 10d ago

NIS5135MN2TXG

onsemi · Resettable Fuses · DFN-10(3x3)

NIS5135MN2TXG from onsemi, in a DFN-10(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SOURCE power_out Source of the internal power FET and the output terminal of the fuse, with all five source pins connected in parallel inside the device.
2 SOURCE power_out Source of the internal power FET and the output terminal of the fuse, with all five source pins connected in parallel inside the device.
3 SOURCE power_out Source of the internal power FET and the output terminal of the fuse, with all five source pins connected in parallel inside the device.
4 SOURCE power_out Source of the internal power FET and the output terminal of the fuse, with all five source pins connected in parallel inside the device.
5 SOURCE power_out Source of the internal power FET and the output terminal of the fuse, with all five source pins connected in parallel inside the device.
6 NC unconnected Listed as NC in the pin function table; the datasheet assigns it no function.
7 ILIMIT passive A resistor between this pin and the source pin sets the overload and short circuit current limit levels.
8 Enable/Fault bidirectional Tri-state bidirectional enable/fault pin that disables the output when pulled to ground by an open-drain or open-collector device and goes to an intermediate level (Vin-mid 0.82 V to 1.95 V) during thermal shutdown.
9 dv/dt passive Sets the output voltage turn-on slew rate: an internal capacitor gives a default ramp of about 2 ms, an external ceramic capacitor can lengthen it, and the pin is left open if no extra delay is needed.
10 GND power_in Negative input voltage to the device and the internal reference for the IC.
11 VCC power_in Positive input voltage to the device, rated -0.6 V to 18 V steady-state and -0.6 V to 25 V for 100 ms transients relative to GND; this is the belly pad (flag) connection.

Key specifications

Parameter Value
Manufacturer onsemi
Package DFN-10(3x3)
Category TVS/Fuse/Board Level Protection
Pins 11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage, operating, steady-state (VCC to GND) VIN -0.6 18 V Operating, steady-state, VCC to GND (Note 1) 2
Input Voltage, transient VIN -0.6 25 V Transient (100 ms) 2
Total Power Dissipation Pmax 1.3 W TA = 25°C 2
Operating Temperature Range TJ -40 150 °C Note 3 2
Nonoperating Temperature Range TJ -55 155 °C Nonoperating 2
Lead Temperature, Soldering TL 260 °C 10 Sec 2
Delay Time (enabling of chip to ID) Tdly 500 µs ID = 100 mA with 1 A resistive load 3
ON Resistance RDSon 54 68 82 mΩ Pulse test (Note 4) 3
ON Resistance at TJ = 140°C RDSon 95 mΩ TJ = 140°C (Note 5) 3
Off State Output Voltage Voff 50 200 mV VCC = 10 Vdc, VGS = 0 Vdc 3
Continuous Current (0.5 in2 pad) ID 3.6 A TA = 25°C, 0.5 in2 pad (Note 5) 3
Continuous Current (minimum copper) ID 1.7 A TA = 80°C, minimum copper 3
Shutdown Temperature TSD 150 175 200 °C Note 5 3
VOUT Maximum (overvoltage clamp) Vout-clamp 5.95 6.65 7.35 V VCC = 10 V 3
Undervoltage Lockout (Turn on, Voltage Going High) VUVLO 3.2 3.6 4 V Turn on, Voltage Going High 3
Kelvin Short Circuit Current Limit ILIM 2.3 3.1 3.9 A RLimit = 11 Ω, Note 6 3
Kelvin Overload Current Limit ILIM 3.5 A RLimit = 11 Ω, Note 6 3
Output Voltage Ramp Time (Enable to VOUT = 4.7 V) tslew 0.7 1.4 2.4 ms Enable to VOUT = 4.7 V 3
Logic Level Low (Output Disabled) Vin-low 0.35 0.58 0.81 V Output Disabled 3
Logic Level Mid (Thermal Fault, Output Disabled) Vin-mid 0.82 1.4 1.95 V Thermal Fault, Output Disabled 3
Logic Level High (Output Enabled) Vin-high 1.96 2.64 3.3 V Output Enabled 3
High State Maximum Voltage Vin-max 3.4 4.3 5.2 V 3
Logic Low Sink Current Iin-low -12 -20 µA Venable = 0 V 3
Logic High Leakage Current for External Switch Iin-leak 1 µA Venable = 3.3 V 3
Maximum Fanout for Fault Signal Fan 3 Units 3
Bias Current (Operational) IBias 1.5 2 mA 3
Bias Current (Shutdown) IBias 1 mA 3
Minimum Operating Voltage Vmin 3.1 V Notes 5 and 7 3
Thermal Resistance, Junction-to-Air (0.1 in2 copper) JA 227 °C/W 0.1 in2 copper (Note 2) 2
Thermal Resistance, Junction-to-Air (0.5 in2 copper) JA 95 °C/W 0.5 in2 copper (Note 2) 2
Thermal Resistance, Junction-to-Lead (Pin 1) JL 27 °C/W 2
Thermal Resistance, Junction-to-Case JC 20 °C/W 2
Derate above 25°C (total power dissipation) 10.4 mW/°C Above 25°C 2

CAD (KiCad official)

  • Symbol: NIS5135MN2TXG
  • Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
  • 3D model: DFN-10(3x3) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 6ed5c6fd2f52fd95, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF