component
NE556N
Public Made by Adomby adom
XBLW Timers / Counters, DIP-14. Pinout reviewed by a person against the datasheet, KiCad symbol/footprint/3D.
main
NE556N
XBLW · Timers / Counters · DIP-14
NE556N from XBLW, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1DISCH | passive | Timer 1 discharge pin (open-collector transistor output to ground); leakage 20 nA typ with output high, saturation voltage 180 mV typ at Vcc=15V, Idis=15mA. |
| 2 | 1THRES | input | Timer 1 threshold comparator input; threshold voltage 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V, maximum input voltage Vcc. |
| 3 | 1CONT | input | Timer 1 control voltage input; control voltage level 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V. |
| 4 | 1RESET | input | Timer 1 active-low reset (inhibit) input to the flip-flop; maximum input voltage Vcc. |
| 5 | 1OUT | output | Timer 1 output that can source or sink up to 200 mA. |
| 6 | 1TRIG | input | Timer 1 trigger comparator input; trigger voltage 5 V typ at Vcc=15V and 1.67 V typ at Vcc=5V, maximum input voltage Vcc. |
| 7 | GND | power_in | Ground, common to both timers. |
| 8 | 2TIG | input | Timer 2 trigger comparator input; trigger voltage 5 V typ at Vcc=15V and 1.67 V typ at Vcc=5V, maximum input voltage Vcc. |
| 9 | 2OUT | output | Timer 2 output that can source or sink up to 200 mA. |
| 10 | 2RESET | input | Timer 2 active-low reset (inhibit) input to the flip-flop; maximum input voltage Vcc. |
| 11 | 2CONT | input | Timer 2 control voltage input; control voltage level 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V. |
| 12 | 2THRES | input | Timer 2 threshold comparator input; threshold voltage 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V, maximum input voltage Vcc. |
| 13 | 2DISCH | passive | Timer 2 discharge pin (open-collector transistor output to ground); leakage 20 nA typ with output high, saturation voltage 180 mV typ at Vcc=15V, Idis=15mA. |
| 14 | VCC | power_in | Positive supply, recommended 4.5 to 18 V with absolute maximum 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | DIP-14 |
| Category | Clock/Timing |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
NE556N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
ne556n-etched.step/ne556n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ne556n.step/ne556n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (10 pp, sha256
cb92c6612ca4e9e1, retrieved 2026-10-21, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NE556N
**XBLW** · Timers / Counters · DIP-14
NE556N from XBLW, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1DISCH | passive | Timer 1 discharge pin (open-collector transistor output to ground); leakage 20 nA typ with output high, saturation voltage 180 mV typ at Vcc=15V, Idis=15mA. |
| 2 | 1THRES | input | Timer 1 threshold comparator input; threshold voltage 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V, maximum input voltage Vcc. |
| 3 | 1CONT | input | Timer 1 control voltage input; control voltage level 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V. |
| 4 | 1RESET | input | Timer 1 active-low reset (inhibit) input to the flip-flop; maximum input voltage Vcc. |
| 5 | 1OUT | output | Timer 1 output that can source or sink up to 200 mA. |
| 6 | 1TRIG | input | Timer 1 trigger comparator input; trigger voltage 5 V typ at Vcc=15V and 1.67 V typ at Vcc=5V, maximum input voltage Vcc. |
| 7 | GND | power_in | Ground, common to both timers. |
| 8 | 2TIG | input | Timer 2 trigger comparator input; trigger voltage 5 V typ at Vcc=15V and 1.67 V typ at Vcc=5V, maximum input voltage Vcc. |
| 9 | 2OUT | output | Timer 2 output that can source or sink up to 200 mA. |
| 10 | 2RESET | input | Timer 2 active-low reset (inhibit) input to the flip-flop; maximum input voltage Vcc. |
| 11 | 2CONT | input | Timer 2 control voltage input; control voltage level 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V. |
| 12 | 2THRES | input | Timer 2 threshold comparator input; threshold voltage 10 V typ at Vcc=15V and 3.33 V typ at Vcc=5V, maximum input voltage Vcc. |
| 13 | 2DISCH | passive | Timer 2 discharge pin (open-collector transistor output to ground); leakage 20 nA typ with output high, saturation voltage 180 mV typ at Vcc=15V, Idis=15mA. |
| 14 | VCC | power_in | Positive supply, recommended 4.5 to 18 V with absolute maximum 18 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | DIP-14 |
| Category | Clock/Timing |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `NE556N`
- Footprint: `Package_DIP:DIP-14_W7.62mm`
- 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files: `ne556n-etched.step` / `ne556n-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ne556n.step` / `ne556n.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [XBLW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8563441342216241152) (10 pp, sha256 `cb92c6612ca4e9e1`, retrieved 2026-10-21, tier: lcsc)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ne556n-datasheet.pdf)