component
NDP7834KC
Public Made by Adomby adom
NDP AC-DC Controllers And Regulators, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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NDP7834KC
NDP · AC-DC Controllers And Regulators · SOP-8
NDP7834KC from NDP, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 2 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 3 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 4 | VCC | power_in | Power supply pin for the controller and driver; the absolute maximum rating for VCC to GND is -0.3 to 6.5 V. |
| 5 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 6 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 7 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 8 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NDP |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | Vcc | 3.6 | 6 | V | 3 | ||
| VCC to GND | -0.3 | 6.5 | V | 2 | |||
| SW to GND | -0.3 | 45 | V | 2 | |||
| Operating Junction Temperature | -40 | 150 | °C | 2 | |||
| Storage Junction Temperature | -55 | 150 | °C | 2 | |||
| UVLO Voltage | VUVLO | 2.3 | V | 3 | |||
| UVLO Hysteresis | 0.2 | V | 3 | ||||
| Vcc voltage clamp | Vovp | 6.2 | V | 3 | |||
| Quiescent Current | ICCQ | 150 | uA | no switch | 3 | ||
| Turn on Threshold | VTH_ON | -170 | mV | 3 | |||
| Driver Voltage Regulator | Vreg | -37 | mV | 3 | |||
| Turn OFF Threshold | VTH_OFF | -20 | mV | 3 | |||
| Turn-off Total Delay | Toff_delay | 30 | nS | 3 | |||
| Minimum on time | Tmin | 1.7 | uS | 3 | |||
| NMOS RDSON | RDS | 9 | mΩ | 3 | |||
| Breakdown Voltage | BVDSS | 40 | V | 3 | |||
| Thermal shutdown Temp | TSD | 150 | °C | 3 | |||
| Thermal Shutdown Hysteresis | TSH | 30 | °C | 3 | |||
| Thermal Resistance from Junction to case | θJC | 80 | °C/W | 2 | |||
| Thermal Resistance from Junction to ambient | θJA | 160 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
NDP7834KC - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ndp7834kc-etched.step/ndp7834kc-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ndp7834kc.step/ndp7834kc.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: NDP datasheet (5 pp, sha256
69847d76e7b74f8f, retrieved 2026-10-20, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NDP7834KC
**NDP** · AC-DC Controllers And Regulators · SOP-8
NDP7834KC from NDP, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 2 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 3 | GND | power_in | Ground reference pin; the datasheet rates VCC to GND at -0.3 to 6.5 V and SW to GND at -0.3 to 45 V. |
| 4 | VCC | power_in | Power supply pin for the controller and driver; the absolute maximum rating for VCC to GND is -0.3 to 6.5 V. |
| 5 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 6 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 7 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
| 8 | SW | passive | Drain of the internal N-channel MOSFET, sensing the switch-node voltage; the absolute maximum rating for SW to GND is -0.3 to 45 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | NDP |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | Vcc | 3.6 | | 6 | V | | 3 |
| VCC to GND | | -0.3 | | 6.5 | V | | 2 |
| SW to GND | | -0.3 | | 45 | V | | 2 |
| Operating Junction Temperature | | -40 | | 150 | °C | | 2 |
| Storage Junction Temperature | | -55 | | 150 | °C | | 2 |
| UVLO Voltage | VUVLO | | 2.3 | | V | | 3 |
| UVLO Hysteresis | | | 0.2 | | V | | 3 |
| Vcc voltage clamp | Vovp | | 6.2 | | V | | 3 |
| Quiescent Current | ICCQ | | 150 | | uA | no switch | 3 |
| Turn on Threshold | VTH_ON | | -170 | | mV | | 3 |
| Driver Voltage Regulator | Vreg | | -37 | | mV | | 3 |
| Turn OFF Threshold | VTH_OFF | | -20 | | mV | | 3 |
| Turn-off Total Delay | Toff_delay | | 30 | | nS | | 3 |
| Minimum on time | Tmin | | 1.7 | | uS | | 3 |
| NMOS RDSON | RDS | | 9 | | mΩ | | 3 |
| Breakdown Voltage | BVDSS | | 40 | | V | | 3 |
| Thermal shutdown Temp | TSD | | 150 | | °C | | 3 |
| Thermal Shutdown Hysteresis | TSH | | 30 | | °C | | 3 |
| Thermal Resistance from Junction to case | θJC | | 80 | | °C/W | | 2 |
| Thermal Resistance from Junction to ambient | θJA | | 160 | | °C/W | | 2 |
## CAD (KiCad official)
- Symbol: `NDP7834KC`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ndp7834kc-etched.step` / `ndp7834kc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ndp7834kc.step` / `ndp7834kc.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [NDP datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602998902229004288) (5 pp, sha256 `69847d76e7b74f8f`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ndp7834kc-datasheet.pdf)