# NDP14301KC

**NDP** · DC-DC Converters · SOP-8

NDP14301KC from NDP, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FB | input | Output voltage feedback input, where the output divider sets VFB against the 1.0 V reference (0.980 to 1.020 V), with an absolute maximum of -0.3 to 6 V to GND. |
| 2 | CSP | input | Positive pole of the current sense input, used with CSN for the 57 to 63 mV (60 mV typ) current sense amplifier signal, with an absolute maximum of -0.3 to 25 V to GND. |
| 3 | CSN | input | Negative pole of the current sense input, paired with CSP for the current sense amplifier, with an absolute maximum of -0.3 to 25 V to GND. |
| 4 | VIN | power_in | Power input positive pole with an input voltage range of 4.6 to 37 V and an absolute maximum of -0.3 to 42 V to GND, with input overvoltage protection at 37 to 39 V (38 V typ). |
| 5 | SW | output | Switching node connected to the inductor, with an absolute maximum of -0.3 V to VIN to GND. |
| 6 | SW | output | Switching node connected to the inductor (second SW pin, bonded in parallel with pin 5), with an absolute maximum of -0.3 V to VIN to GND. |
| 7 | EN | input | Enable input with an internal pull-up, where EN high requires at least 1.2 V and EN low is 0.6 V or below, with an absolute maximum of -0.3 to 6 V to GND. |
| 8 | GND | power_in | Ground reference pin for the device, to which all absolute maximum ratings are referenced. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | NDP |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `NDP14301KC`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ndp14301kc-etched.step` / `ndp14301kc-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ndp14301kc.step` / `ndp14301kc.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [NDP datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904705239633920) (12 pp, sha256 `876cd18f9919c7f1`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ndp14301kc-datasheet.pdf)