component
NCV887720D1R2G
Public Made by Adomby adom
onsemi DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
NCV887720D1R2G
onsemi · DC-DC Converters · SOIC-8
NCV887720D1R2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DISB | input | Disable input; the part is disabled when this pin is brought low (absolute max -0.3 to 6 V). |
| 2 | ISNS | input | Current sense input connected to the external N-MOSFET source through a current-sense resistor to ground to sense switching current for regulation and current limiting (absolute max -0.3 to 3.6 V). |
| 3 | GND | power_in | Ground reference. |
| 4 | GDRV | output | Gate driver output connected to the gate of the external N-MOSFET, with an optional series resistance to tailor EMC performance (absolute max 12 V). |
| 5 | VDRV | power_out | Internally regulated gate-drive supply sourced from VOUT, bypassed with a 1.0 µF ceramic capacitor to ground (absolute max 12 V). |
| 6 | VOUT | power_in | Monitors output voltage and provides IC input voltage (DC absolute max -0.3 to 40 V, 45 V load dump peak). |
| 7 | VC | output | Output of the voltage error transconductance amplifier, with an external compensator network from VC to GND to stabilize the converter (absolute max -0.3 to 3.6 V). |
| 8 | ROSC | passive | Connect a resistor to ground to set the switching frequency (absolute max -0.3 to 3.6 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Supply Chip |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage Regulation | VOUT,reg | 9.8 | 10 | 10.2 | V | NCV887720 | 5 |
| Threshold IC Enable | 10.36 | 10.65 | 10.94 | V | VOUT descending, NCV887720 | 5 | |
| Threshold IC Disable | 10.96 | 11.25 | 11.54 | V | VOUT ascending, NCV887720 | 5 | |
| Threshold IC Enable, Voltage Regulation | 0.39 | 0.6 | V | NCV887720 | 5 | ||
| Threshold IC Disable, Threshold IC Enable | 0.5 | V | NCV887720 | 5 | |||
| Undervoltage Lock-out Threshold Voltage | Vuvlo | 3.6 | 3.8 | 4 | V | VOUT falling, NCV887720 | 5 |
| Undervoltage Lock-out Hysteresis | Vuvlo,hys | 330 | 450 | 570 | mV | VOUT rising, NCV887720 | 5 |
| Driving Voltage | VDRV | 5.8 | 6 | 6.2 | V | IVDRV = 0.1 − 25 mA, NCV887720 | 5 |
| Quiescent Current, Sleep Mode | Iq,sleep | 12 | 14 | µA | VOUT = 13.2 V, TJ = 25°C, DISB = 0 V | 4 | |
| Quiescent Current, No switching | Iq,off | 2.2 | 4 | mA | Into VOUT pin, VOUT,reg < VOUT < VOUT,des, No switching | 4 | |
| Switching Frequency | FSW | 153 | 501 | kHz | 4 | ||
| Switching Frequency | FSW | 153 | 170 | 187 | kHz | ROSC = Open | 4 |
| Switching Frequency | FSW | 180 | 200 | 220 | kHz | ROSC = 100 k | 4 |
| Switching Frequency | FSW | 283 | 315 | 347 | kHz | ROSC = 20 k | 4 |
| Switching Frequency | FSW | 409 | 455 | 501 | kHz | ROSC = 10 k | 4 |
| ROSC Voltage | VROSC | 1 | V | 4 | |||
| Minimum Pulse Width | ton,min | 90 | 115 | 145 | ns | NCV887720 | 4 |
| Maximum Duty Cycle | Dmax | 81 | 83 | 85 | % | ROSC = Open, NCV887720 | 4 |
| Slope Compensating Ramp | Sa | 46 | 53 | 60 | mV/µs | NCV887720 (Note 2) | 4 |
| DISB Pull-down Current | IDIS | 0.6 | 1 | µA | VDIS = 5 V (Note 2) | 4 | |
| DISB Input High Voltage | Vd,ih | 2 | 5 | V | 4 | ||
| DISB Input High Voltage Hysteresis | Vd,hys | 500 | mV | 4 | |||
| DISB Input Low Voltage | Vd,il | 0 | 800 | mV | 4 | ||
| Low-Frequency Gain | Acsa | 0.9 | 1 | 1.1 | V/V | Input-to-output gain at dc, ISNS ≤ 1 V | 4 |
| Bandwidth | BWcsa | 2.5 | MHz | Gain of Acsa − 3 dB | 4 | ||
| ISNS Input Bias Current | Isns,bias | 30 | 50 | µA | Out of ISNS pin | 4 | |
| Current Limit Threshold Voltage | Vcl | 180 | 200 | 220 | mV | Voltage on ISNS pin, NCV887720 | 4 |
| Current Limit Response Time | tcl | 80 | 125 | ns | CL tripped until GDRV falling edge, VISNS = Vcl(typ) + 60 mV (Note 2) | 4 | |
| Overcurrent Protection Threshold Voltage | %Vocp | 125 | 150 | 175 | % | Percent of Vcl | 4 |
| Overcurrent Protection Response Time | tocp | 80 | 125 | ns | From overcurrent event, Until switching stops, VISNS = VOCP + 40 mV (Note 2) | 4 | |
| Transconductance | gm,vea | 0.8 | 1.2 | 1.63 | mS | VOUT = ±100 mV | 4 |
| VEA Output Resistance | Ro,vea | 2 | MΩ | Note 2 | 4 | ||
| VEA Maximum Output Voltage | Vc,max | 2.5 | V | 4 | |||
| VEA Sourcing Current | Isrc,vea | 80 | 100 | µA | VEA output current, Vc = 2.0 V | 4 | |
| VEA Sinking Current | Isnk,vea | 80 | 100 | µA | VEA output current, Vc = 1.5 V | 5 | |
| VEA Clamp Voltage | Vc,clamp | 1.1 | V | VOUT < VOUT,des | 5 | ||
| GDRV Switching Delay | 55 | 64 | µs | VOUT < VOUT,des or when IC DISB goes from low to high with Vc pin compensation network disconnected | 5 | ||
| Gate Driver Sourcing Current | Isrc | 550 | 800 | mA | VDRV ≥ Typical Driving Voltage Specification, VDRV − VGDRV = 2 V | 5 | |
| Gate Driver Sinking Current | Isink | 480 | 600 | mA | VGDRV ≥ 2 V | 5 | |
| Driving Voltage Dropout | Vdrv,do | 0.3 | 0.6 | V | VOUT − VDRV, IvDRV = 25 mA (Note 2) | 5 | |
| Driving Voltage Source Current | Idrv | 35 | 45 | mA | VOUT − VDRV = 1 V | 5 | |
| Backdrive Diode Voltage Drop | Vd,bd | 0.7 | V | VDRV, VOUT, Id,bd = 5 mA | 5 | ||
| Pull-down Resistance | 21 | kΩ | 5 | ||||
| Thermal Shutdown Threshold | Tsd | 160 | 170 | 180 | °C | TJ rising (Note 2) | 5 |
| Thermal Shutdown Hysteresis | Tsd,hys | 10 | 15 | 20 | °C | TJ falling (Note 2) | 5 |
| Thermal Shutdown Delay | tsd,dly | 100 | ns | From TJ > Tsd to stop switching (Note 2) | 5 | ||
| Dc Supply Voltage (VOUT) | VOUT | -0.3 | 40 | V | 3 | ||
| Peak Transient Voltage (Load Dump on VOUT) | 45 | V | 3 | ||||
| Dc Supply Voltage (VDRV, GDRV) | 12 | V | 3 | ||||
| Dc Voltage (VC, ISNS, ROSC) | -0.3 | 3.6 | V | 3 | |||
| Dc Voltage (DISB) | -0.3 | 6 | V | 3 | |||
| Dc Voltage Stress (VOUT − VDRV) | -0.7 | 40 | V | 3 | |||
| Operating Junction Temperature | TJ | -40 | 150 | °C | 3 | ||
| Storage Temperature Range | -65 | 150 | °C | 3 | |||
| Peak Reflow Soldering Temperature | 265 | °C | Pb-Free, 60 to 150 seconds at 217°C | 3 | |||
| Package Thermal Resistance Junction-to-Ambient | RθJA | 100 | °C/W | 1 in2, 1 oz copper area used for heatsinking | 3 |
CAD (KiCad official)
- Symbol:
NCV887720D1R2G - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ncv887720d1r2g-etched.step/ncv887720d1r2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ncv887720d1r2g.step/ncv887720d1r2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (17 pp, sha256
5b4e8af76545e4e2, retrieved 2026-10-23, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# NCV887720D1R2G
**onsemi** · DC-DC Converters · SOIC-8
NCV887720D1R2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DISB | input | Disable input; the part is disabled when this pin is brought low (absolute max -0.3 to 6 V). |
| 2 | ISNS | input | Current sense input connected to the external N-MOSFET source through a current-sense resistor to ground to sense switching current for regulation and current limiting (absolute max -0.3 to 3.6 V). |
| 3 | GND | power_in | Ground reference. |
| 4 | GDRV | output | Gate driver output connected to the gate of the external N-MOSFET, with an optional series resistance to tailor EMC performance (absolute max 12 V). |
| 5 | VDRV | power_out | Internally regulated gate-drive supply sourced from VOUT, bypassed with a 1.0 µF ceramic capacitor to ground (absolute max 12 V). |
| 6 | VOUT | power_in | Monitors output voltage and provides IC input voltage (DC absolute max -0.3 to 40 V, 45 V load dump peak). |
| 7 | VC | output | Output of the voltage error transconductance amplifier, with an external compensator network from VC to GND to stabilize the converter (absolute max -0.3 to 3.6 V). |
| 8 | ROSC | passive | Connect a resistor to ground to set the switching frequency (absolute max -0.3 to 3.6 V). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Supply Chip |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Voltage Regulation | VOUT,reg | 9.8 | 10 | 10.2 | V | NCV887720 | 5 |
| Threshold IC Enable | | 10.36 | 10.65 | 10.94 | V | VOUT descending, NCV887720 | 5 |
| Threshold IC Disable | | 10.96 | 11.25 | 11.54 | V | VOUT ascending, NCV887720 | 5 |
| Threshold IC Enable, Voltage Regulation | | 0.39 | 0.6 | | V | NCV887720 | 5 |
| Threshold IC Disable, Threshold IC Enable | | | 0.5 | | V | NCV887720 | 5 |
| Undervoltage Lock-out Threshold Voltage | Vuvlo | 3.6 | 3.8 | 4 | V | VOUT falling, NCV887720 | 5 |
| Undervoltage Lock-out Hysteresis | Vuvlo,hys | 330 | 450 | 570 | mV | VOUT rising, NCV887720 | 5 |
| Driving Voltage | VDRV | 5.8 | 6 | 6.2 | V | IVDRV = 0.1 − 25 mA, NCV887720 | 5 |
| Quiescent Current, Sleep Mode | Iq,sleep | | 12 | 14 | µA | VOUT = 13.2 V, TJ = 25°C, DISB = 0 V | 4 |
| Quiescent Current, No switching | Iq,off | | 2.2 | 4 | mA | Into VOUT pin, VOUT,reg < VOUT < VOUT,des, No switching | 4 |
| Switching Frequency | FSW | 153 | | 501 | kHz | | 4 |
| Switching Frequency | FSW | 153 | 170 | 187 | kHz | ROSC = Open | 4 |
| Switching Frequency | FSW | 180 | 200 | 220 | kHz | ROSC = 100 k | 4 |
| Switching Frequency | FSW | 283 | 315 | 347 | kHz | ROSC = 20 k | 4 |
| Switching Frequency | FSW | 409 | 455 | 501 | kHz | ROSC = 10 k | 4 |
| ROSC Voltage | VROSC | | 1 | | V | | 4 |
| Minimum Pulse Width | ton,min | 90 | 115 | 145 | ns | NCV887720 | 4 |
| Maximum Duty Cycle | Dmax | 81 | 83 | 85 | % | ROSC = Open, NCV887720 | 4 |
| Slope Compensating Ramp | Sa | 46 | 53 | 60 | mV/µs | NCV887720 (Note 2) | 4 |
| DISB Pull-down Current | IDIS | | 0.6 | 1 | µA | VDIS = 5 V (Note 2) | 4 |
| DISB Input High Voltage | Vd,ih | 2 | | 5 | V | | 4 |
| DISB Input High Voltage Hysteresis | Vd,hys | | 500 | | mV | | 4 |
| DISB Input Low Voltage | Vd,il | 0 | | 800 | mV | | 4 |
| Low-Frequency Gain | Acsa | 0.9 | 1 | 1.1 | V/V | Input-to-output gain at dc, ISNS ≤ 1 V | 4 |
| Bandwidth | BWcsa | 2.5 | | | MHz | Gain of Acsa − 3 dB | 4 |
| ISNS Input Bias Current | Isns,bias | | 30 | 50 | µA | Out of ISNS pin | 4 |
| Current Limit Threshold Voltage | Vcl | 180 | 200 | 220 | mV | Voltage on ISNS pin, NCV887720 | 4 |
| Current Limit Response Time | tcl | | 80 | 125 | ns | CL tripped until GDRV falling edge, VISNS = Vcl(typ) + 60 mV (Note 2) | 4 |
| Overcurrent Protection Threshold Voltage | %Vocp | 125 | 150 | 175 | % | Percent of Vcl | 4 |
| Overcurrent Protection Response Time | tocp | | 80 | 125 | ns | From overcurrent event, Until switching stops, VISNS = VOCP + 40 mV (Note 2) | 4 |
| Transconductance | gm,vea | 0.8 | 1.2 | 1.63 | mS | VOUT = ±100 mV | 4 |
| VEA Output Resistance | Ro,vea | 2 | | | MΩ | Note 2 | 4 |
| VEA Maximum Output Voltage | Vc,max | 2.5 | | | V | | 4 |
| VEA Sourcing Current | Isrc,vea | 80 | 100 | | µA | VEA output current, Vc = 2.0 V | 4 |
| VEA Sinking Current | Isnk,vea | 80 | 100 | | µA | VEA output current, Vc = 1.5 V | 5 |
| VEA Clamp Voltage | Vc,clamp | | 1.1 | | V | VOUT < VOUT,des | 5 |
| GDRV Switching Delay | | | 55 | 64 | µs | VOUT < VOUT,des or when IC DISB goes from low to high with Vc pin compensation network disconnected | 5 |
| Gate Driver Sourcing Current | Isrc | 550 | 800 | | mA | VDRV ≥ Typical Driving Voltage Specification, VDRV − VGDRV = 2 V | 5 |
| Gate Driver Sinking Current | Isink | 480 | 600 | | mA | VGDRV ≥ 2 V | 5 |
| Driving Voltage Dropout | Vdrv,do | | 0.3 | 0.6 | V | VOUT − VDRV, IvDRV = 25 mA (Note 2) | 5 |
| Driving Voltage Source Current | Idrv | 35 | 45 | | mA | VOUT − VDRV = 1 V | 5 |
| Backdrive Diode Voltage Drop | Vd,bd | | | 0.7 | V | VDRV, VOUT, Id,bd = 5 mA | 5 |
| Pull-down Resistance | | | 21 | | kΩ | | 5 |
| Thermal Shutdown Threshold | Tsd | 160 | 170 | 180 | °C | TJ rising (Note 2) | 5 |
| Thermal Shutdown Hysteresis | Tsd,hys | 10 | 15 | 20 | °C | TJ falling (Note 2) | 5 |
| Thermal Shutdown Delay | tsd,dly | | | 100 | ns | From TJ > Tsd to stop switching (Note 2) | 5 |
| Dc Supply Voltage (VOUT) | VOUT | -0.3 | | 40 | V | | 3 |
| Peak Transient Voltage (Load Dump on VOUT) | | | | 45 | V | | 3 |
| Dc Supply Voltage (VDRV, GDRV) | | | | 12 | V | | 3 |
| Dc Voltage (VC, ISNS, ROSC) | | -0.3 | | 3.6 | V | | 3 |
| Dc Voltage (DISB) | | -0.3 | | 6 | V | | 3 |
| Dc Voltage Stress (VOUT − VDRV) | | -0.7 | | 40 | V | | 3 |
| Operating Junction Temperature | TJ | -40 | | 150 | °C | | 3 |
| Storage Temperature Range | | -65 | | 150 | °C | | 3 |
| Peak Reflow Soldering Temperature | | | | 265 | °C | Pb-Free, 60 to 150 seconds at 217°C | 3 |
| Package Thermal Resistance Junction-to-Ambient | RθJA | | 100 | | °C/W | 1 in2, 1 oz copper area used for heatsinking | 3 |
## CAD (KiCad official)
- Symbol: `NCV887720D1R2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ncv887720d1r2g-etched.step` / `ncv887720d1r2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncv887720d1r2g.step` / `ncv887720d1r2g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/ncv887720d1r2-d.pdf) (17 pp, sha256 `5b4e8af76545e4e2`, retrieved 2026-10-23, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ncv887720d1r2g-datasheet.pdf)