component

NCV8402ADDR2G

Public Made by Adom

by adom

onsemi AC-DC Controllers and Regulators, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ncv8402addr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
ncv8402addr2g-etched.fit.json ncv8402addr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ncv8402addr2g-etched.glb ncv8402addr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ncv8402addr2g-etched.step ncv8402addr2g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ncv8402addr2g.glb Publish 0.1.0 · Ray
ncv8402addr2g.kicad_mod Publish 0.1.0 · Ray
ncv8402addr2g.kicad_sym Publish 0.1.0 · Ray
ncv8402addr2g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ncv8402addr2g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ncv8402addr2g: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ncv8402addr2g: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

NCV8402ADDR2G

onsemi · AC-DC Controllers and Regulators · SOIC-8

NCV8402ADDR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Source1 passive Source of channel-1 low-side N-channel MOSFET. Typically tied to system ground (load current return, internally current-sensed for the 3.7-5.0 A current limit).
2 Gate1 input Gate (logic-level input) of channel-1 MOSFET. Analog drive capable; VGS(th) ≈ 1.3-2.2 V, absolute max VGS = ±14 V. Drives the internal N-MOSFET on/off; overvoltage is clamped drain-to-gate for inductive-load protection.
3 Source2 passive Source of channel-2 low-side N-channel MOSFET. Typically tied to system ground; independent from channel-1 source.
4 Gate2 input Gate (logic-level input) of channel-2 MOSFET. Same electrical characteristics as Gate1: VGS(th) ≈ 1.3-2.2 V, VGS max ±14 V, analog drive capable.
5 Drain2 passive Drain of channel-2 MOSFET (connects to the switched load). Internally clamped at 42 V (V(BR)DSS). Bonded to two package pins (5 and 6) to share current and improve thermal conduction - tie both to the load node.
6 Drain2 passive Drain of channel-2 MOSFET (same net as pin 5). Second drain pin provided for current sharing and PCB heat spreading.
7 Drain1 passive Drain of channel-1 MOSFET (connects to the switched load). Internally clamped at 42 V. Bonded to two package pins (7 and 8) for current sharing and thermal dissipation.
8 Drain1 passive Drain of channel-1 MOSFET (same net as pin 7). Second drain pin provided for current sharing and PCB heat spreading.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • NCV8402ADDR2G

CAD (KiCad official)

  • Symbol: NCV8402ADDR2G
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ncv8402addr2g-etched.step / ncv8402addr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv8402addr2g.step / ncv8402addr2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ncv8402addr2g.step 122 KB You want the bare part, or you mark your own boards.
ncv8402addr2g-etched.step 2.6 MB You want the part with NCV8402ADDR2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 643 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 c70bb5c67ed1d089, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF