# NCV8184DR2G

**onsemi** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOIC-8

NCV8184DR2G from onsemi, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output, rated for 70 mA source capability, with the VOUT/Adj voltage range given as −3.0 to 45 V. |
| 2 | GND | power_in | Ground; on the SOIC-8 (non-EP) variant this lead is GND, while on the SOIC-8 EP variant it is NC. |
| 3 | GND | power_in | Ground. |
| 4 | Adj | input | Adjust lead, described in the pin table as the noninverting input, with the output tracking the VREF/ENABLE input within ±3.0 mV. |
| 5 | VREF/ENABLE | power_in | Reference voltage and ENABLE input, with a voltage range of −0.3 to 45 V; pulling it below 0.8 V disables the IC and above 2.1 V lets VOUT track it. |
| 6 | GND | power_in | Ground. |
| 7 | GND | power_in | Ground. |
| 8 | VIN | power_in | Battery supply input voltage, with a supply operating range of 4.0 to 42 V and a continuous rating of −15 to 45 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VOUT Tracking Error | VREF/ENABLE − VOUT | -3 |  | 3 | mV | 5.7 V ≤ VIN ≤ 26 V, 100 µA ≤ IOUT ≤ 60 mA, 2.1 V ≤ VREF/ENABLE ≤ (VIN − 600 mV) | 2 |
| Dropout Voltage | VIN − VOUT |  | 100 | 150 | mV | IOUT = 100 µA | 2 |
| Dropout Voltage | VIN − VOUT |  | 250 | 500 | mV | IOUT = 5.0 mA | 2 |
| Dropout Voltage | VIN − VOUT |  | 350 | 600 | mV | IOUT = 60 mA | 2 |
| Line Regulation |  |  |  | 3 | mV | 5.7 V ≤ VIN ≤ 26 V, VREF/ENABLE = 5.0 V | 2 |
| Load Regulation |  |  |  | 3 | mV | 100 µA ≤ IOUT ≤ 60 mA, VREF/ENABLE = 5.0 V | 2 |
| Adj Input Bias Current |  |  | 0.2 | 6 | µA | VREF/ENABLE = 5.0 V | 2 |
| Current Limit |  | 70 |  | 225 | mA | VIN = 14 V, VREF = 5.0 V, VOUT = 90% of VREF (Note 3) | 2 |
| Quiescent Current (IIN − IOUT) |  |  | 5 | 7 | mA | VIN = 12 V, IOUT = 60 mA | 2 |
| Quiescent Current (IIN − IOUT) |  |  | 50 | 70 | µA | VIN = 12 V, IOUT = 100 µA | 2 |
| Quiescent Current (IIN − IOUT) |  |  |  | 20 | µA | VIN = 12 V, VREF/ENABLE = 0 V | 2 |
| Ripple Rejection |  | 60 |  |  | dB | f = 120 Hz, IOUT = 60 mA, 6.0 V ≤ VIN ≤ 26 V | 2 |
| Thermal Shutdown |  | 150 | 180 | 210 | °C | Guaranteed by Design | 2 |
| Enable Voltage (disable level) | VREF/ENABLE |  |  | 0.8 | V |  | 2 |
| Enable Voltage (enable level) | VREF/ENABLE | 2.1 |  |  | V |  | 2 |
| Input Bias Current |  |  | 0.2 | 3 | µA | VREF/ENABLE = 5.0 V | 2 |
| Storage Temperature |  | -65 |  | 150 | °C |  | 2 |
| Supply Voltage Range (Continuous) | VIN | -15 |  | 45 | V |  | 2 |
| Voltage Range (VOUT, Adj) | VOUT, Adj | -3 |  | 45 | V |  | 2 |
| Voltage Range (VREF/ENABLE) | VREF/ENABLE | -0.3 |  | 45 | V |  | 2 |
| Peak Transient Voltage |  |  |  | 45 | V | VIN = 14 V, Load Dump Transient = 31 V | 2 |
| Maximum Junction Temperature |  |  |  | 150 | °C |  | 2 |
| ESD Capability Human Body Model |  |  |  | 2.5 | kV |  | 2 |
| ESD Capability Machine Model |  |  |  | 200 | V |  | 2 |
| ESD Capability Charge Device Model |  |  |  | 1000 | V |  | 2 |
| Lead Temperature Soldering Reflow (Pb-Free) |  |  |  | 260 | °C | Reflow, Pb-Free devices (Note 2) | 2 |
| Supply Voltage Operating Range | VIN | 4 |  | 42 | V |  | 2 |
| Junction-to-Ambient (RθJA) | RθJA |  | 151 |  | °C/W | SOIC-8, 100 mm² spreader board, 1 oz Cu | 8 |
| Junction-to-Ambient (RθJA) | RθJA |  | 135 |  | °C/W | SOIC-8, 100 mm² spreader board, 2 oz Cu | 8 |
| Junction-to-Ambient (RθJA) | RθJA |  | 111 |  | °C/W | SOIC-8, 645 mm² spreader board, 1 oz Cu | 8 |
| Junction-to-Ambient (RθJA) | RθJA |  | 100 |  | °C/W | SOIC-8, 645 mm² spreader board, 2 oz Cu | 8 |
| Junction-to-Pin 6 (JL6) | JL6 |  | 53 |  | °C/W | SOIC-8, 100 mm² spreader board, 1 oz Cu | 8 |
| Junction-to-Pin 6 (JL6) | JL6 |  | 51 |  | °C/W | SOIC-8, 100 mm² spreader board, 2 oz Cu | 8 |
| Junction-to-Pin 6 (JL6) | JL6 |  | 50 |  | °C/W | SOIC-8, 645 mm² spreader board, 1 oz Cu | 8 |
| Junction-to-Pin 6 (JL6) | JL6 |  | 47 |  | °C/W | SOIC-8, 645 mm² spreader board, 2 oz Cu | 8 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | Copper |  | Table 3. DPAK 5−LEAD THERMAL RC NETWORK MODELS* Drain Copper Area (1 oz thick) 100 mm2 645 mm2 100 mm2 645 mm2 | 15 |

## CAD (KiCad official)

- Symbol: `NCV8184DR2G`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ncv8184dr2g-etched.step` / `ncv8184dr2g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ncv8184dr2g.step` / `ncv8184dr2g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588879836195016704) (20 pp, sha256 `1482e8de9b52f649`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ncv8184dr2g-datasheet.pdf)