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NCV8161AMX180TBG

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onsemi Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, XDFN-4(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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NCV8161AMX180TBG

onsemi · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · XDFN-4(1x1)

NCV8161AMX180TBG from onsemi, in a XDFN-4(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Regulated output voltage; the output should be bypassed with a small 1 µF ceramic capacitor.
2 GND power_in Common ground connection.
3 EN input Chip enable: applying VEN < 0.4 V disables the regulator, and pulling VEN > 1.2 V enables the LDO.
4 IN power_in Input voltage supply pin; the operating input voltage range is 1.9 V to 5.5 V.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer onsemi
Package XDFN-4(1x1)
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating Input Voltage VIN 1.9 5.5 V 4
Output Voltage Accuracy VOUT -2 2 % −40°C ≤ TJ ≤ 125°C 4
Load Regulation (XDFN4) LoadReg 0.001 0.005 %/mA IOUT = 1 mA to 450 mA 4
Dropout Voltage (XDFN4) VDO 325 450 mV IOUT = 450 mA, VOUT(NOM) = 1.8 V (XDFN4) 4
Output Current Limit ICL 450 700 mA VOUT = 90% VOUT(NOM) 4
Quiescent Current IQ 18 23 A IOUT = 0 mA 4
Shutdown Current IDIS 0.01 1 A VEN ≤ 0.4 V, VIN = 4.8 V 4
EN Input Voltage High VENH 1.2 V 4
EN Input Voltage Low VENL 0.4 V 4
EN Pull Down Current IEN 0.2 0.5 A VEN = 4.8 V 4
Input Voltage VIN -0.3 6 V 3
Output Voltage VOUT -0.3 6 V VIN + 0.3, max. 6 V 3
Chip Enable Input VCE -0.3 6 V VIN + 0.3, max. 6 V 3
Operating Ambient Temperature Range TA -40 125 °C 3
Maximum Junction Temperature TJ 150 °C 3
Storage Temperature Range TSTG -55 150 °C 3
Input Voltage (recommended) VIN 1.9 5.5 V 3
Junction Temperature (recommended) TJ -40 125 °C 3
Output Capacitor ESR ESR 2 Ω COUT ESR maximum 12
Thermal Resistance, Junction-to-Air (XDFN4) RJA 198 °C/W JEDEC board specification (Note 3) 3

CAD (KiCad official)

  • Symbol: NCV8161AMX180TBG
  • Footprint: Package_DFN_QFN:OnSemi_XDFN4-1EP_1.0x1.0mm_EP0.52x0.52mm
  • 3D model: XDFN-4(1x1) (KiCad packages3D, STEP)
  • 3D model files: ncv8161amx180tbg-etched.step / ncv8161amx180tbg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv8161amx180tbg.step / ncv8161amx180tbg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (17 pp, sha256 9393639cf9da3721, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF